Commit 5461fa2b authored by Fangrui Song's avatar Fangrui Song
Browse files

[ELF][ARM] Fix regression of BL->BLX substitution after D73542 

D73542 made a typo (`rel.type == R_PLT_PC`; should be `rel.expr`) and introduced a regression:
BL->BLX substitution was disabled when the target symbol is preemptible
(expr is R_PLT_PC).

The two added bl instructions in arm-thumb-interwork-shared.s check that
we patch BL to BLX.

Fixes https://bugs.chromium.org/p/chromium/issues/detail?id=1047531
parent 4a3760d2

lld/ELF/Arch/ARM.cpp

+2 −2
Original line number Diff line number Diff line
@@ -409,7 +409,7 @@ void ARM::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const { 
    // not of type STT_FUNC then we must preserve the original instruction.

    // PLT entries are always ARM state so we know we don't need to interwork.

    bool isBlx = (read32le(loc) & 0xfe000000) == 0xfa000000;

    bool interwork = rel.sym && rel.sym->isFunc() && rel.type != R_PLT_PC;

    bool interwork = rel.sym && rel.sym->isFunc() && rel.expr != R_PLT_PC;

    if (interwork ? val & 1 : isBlx) {

      // The BLX encoding is 0xfa:H:imm24 where Val = imm24:H:'1'

      checkInt(loc, val, 26, rel);
@@ -454,7 +454,7 @@ void ARM::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const { 
    // not of type STT_FUNC then we must preserve the original instruction.

    // PLT entries are always ARM state so we know we need to interwork.

    bool isBlx = (read16le(loc + 2) & 0x1000) == 0;

    bool interwork = (rel.sym && rel.sym->isFunc()) || rel.type == R_PLT_PC;

    bool interwork = (rel.sym && rel.sym->isFunc()) || rel.expr == R_PLT_PC;

    if (interwork ? (val & 1) == 0 : isBlx) {

      // We are writing a BLX. Ensure BLX destination is 4-byte aligned. As

      // the BLX instruction may only be two byte aligned. This must be done

lld/test/ELF/arm-thumb-interwork-shared.s

+32 −27
Original line number Diff line number Diff line 
// REQUIRES: arm

// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t

// RUN: ld.lld %t --shared -o %t.so

// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t.so | FileCheck %s

// RUN: llvm-objdump -d --no-show-raw-insn -triple=thumbv7a-none-linux-gnueabi %t.so | FileCheck %s

 .syntax unified

 .global sym1

 .global elsewhere
@@ -10,46 +10,51 @@ sym1: 
 b.w elsewhere

 b.w weakref



 bl elsewhere

 bl weakref



// Check that we generate a thunk for an undefined symbol called via a plt

// entry.



// CHECK: Disassembly of section .text:

// CHECK-EMPTY:

// CHECK-NEXT: sym1:

// CHECK-NEXT: 11e0: 00 f0 02 b8 b.w #4 <__ThumbV7PILongThunk_elsewhere>

// CHECK-NEXT: 11e4: 00 f0 06 b8 b.w #12 <__ThumbV7PILongThunk_weakref>

// CHECK-NEXT:     11e0: b.w #12 <__ThumbV7PILongThunk_elsewhere>

// CHECK-NEXT:           b.w #20 <__ThumbV7PILongThunk_weakref>

// CHECK-NEXT:           blx #68

// CHECK-NEXT:           blx #80

// CHECK: __ThumbV7PILongThunk_elsewhere:

// CHECK-NEXT:     11e8:       40 f2 2c 0c     movw    r12, #44

// CHECK-NEXT:     11ec:       c0 f2 00 0c     movt    r12, #0

// CHECK-NEXT:     11f0:       fc 44   add     r12, pc

// CHECK-NEXT:     11f2:       60 47   bx      r12

// CHECK-NEXT:     11f0: movw    r12, #52

// CHECK-NEXT:           movt    r12, #0

// CHECK-NEXT:           add     r12, pc

// CHECK-NEXT:           bx      r12

// CHECK: __ThumbV7PILongThunk_weakref:

// CHECK-NEXT:     11f4:       40 f2 30 0c     movw    r12, #48

// CHECK-NEXT:     11f8:       c0 f2 00 0c     movt    r12, #0

// CHECK-NEXT:     11fc:       fc 44   add     r12, pc

// CHECK-NEXT:     11fe:       60 47   bx      r12

// CHECK-NEXT:     11fc: movw    r12, #56

// CHECK-NEXT:           movt    r12, #0

// CHECK-NEXT:           add     r12, pc

// CHECK-NEXT:           bx      r12



// CHECK: Disassembly of section .plt:

// CHECK-EMPTY:

// CHECK-NEXT: $a:

// CHECK-NEXT:     1200:  04 e0 2d e5     str     lr, [sp, #-4]!

// CHECK-NEXT:     1204:  00 e6 8f e2     add     lr, pc, #0, #12

// CHECK-NEXT:     1208:  02 ea 8e e2     add     lr, lr, #8192

// CHECK-NEXT:     120c:  94 f0 be e5     ldr     pc, [lr, #148]!

// CHECK-NEXT:     1210: str     lr, [sp, #-4]!

// CHECK-NEXT:           add     lr, pc, #0, #12

// CHECK-NEXT:           add     lr, lr, #8192

// CHECK-NEXT:           ldr     pc, [lr, #148]!

// CHECK: $d:

// CHECK-NEXT:     1210:  d4 d4 d4 d4     .word   0xd4d4d4d4

// CHECK-NEXT:     1214:  d4 d4 d4 d4     .word   0xd4d4d4d4

// CHECK-NEXT:     1218:  d4 d4 d4 d4     .word   0xd4d4d4d4

// CHECK-NEXT:     121c:  d4 d4 d4 d4     .word   0xd4d4d4d4

// CHECK-NEXT:     1220: d4 d4 d4 d4 .word   0xd4d4d4d4

// CHECK-NEXT:           .word   0xd4d4d4d4

// CHECK-NEXT:           .word   0xd4d4d4d4

// CHECK-NEXT:           .word   0xd4d4d4d4

// CHECK: $a:

// CHECK-NEXT:     1220:  00 c6 8f e2     add     r12, pc, #0, #12

// CHECK-NEXT:     1224:  02 ca 8c e2     add     r12, r12, #8192

// CHECK-NEXT:     1228:  7c f0 bc e5     ldr     pc, [r12, #124]!

// CHECK-NEXT:     1230: add     r12, pc, #0, #12

// CHECK-NEXT:           add     r12, r12, #8192

// CHECK-NEXT:           ldr     pc, [r12, #124]!

// CHECK: $d:

// CHECK-NEXT:     122c:  d4 d4 d4 d4     .word   0xd4d4d4d4

// CHECK-NEXT:     123c: d4 d4 d4 d4 .word   0xd4d4d4d4

// CHECK: $a:

// CHECK-NEXT:     1230:  00 c6 8f e2     add     r12, pc, #0, #12

// CHECK-NEXT:     1234:  02 ca 8c e2     add     r12, r12, #8192

// CHECK-NEXT:     1238:  70 f0 bc e5     ldr     pc, [r12, #112]!

// CHECK-NEXT:     1240: add     r12, pc, #0, #12

// CHECK-NEXT:           add     r12, r12, #8192

// CHECK-NEXT:           ldr     pc, [r12, #112]!

// CHECK: $d:

// CHECK-NEXT:     123c:  d4 d4 d4 d4     .word   0xd4d4d4d4
 
// CHECK-NEXT:     124c: d4 d4 d4 d4 .word   0xd4d4d4d4