Commit 4a3760d2 authored by Jonas Paulsson's avatar Jonas Paulsson
Browse files

[SystemZ] Improve handling of inline asm constraints.

The "{=v0}" constraint did not result in the expected error message in the
abscence of the vector facility, because 'v0' matches as a string into the
AnyRegBitRegClass in common code.

This patch adds checks for vector support in case of "{v" and soft-float in
case of "{f" to remedy this.

Review: Ulrich Weigand.
parent 5687acf4
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+7 −1
Original line number Diff line number Diff line
@@ -1163,7 +1163,10 @@ SystemZTargetLowering::getRegForInlineAsmConstraint(
      return parseRegisterNumber(Constraint, &SystemZ::GR64BitRegClass,
                                 SystemZMC::GR64Regs, 16);
    }
    if (Constraint[1] == 'f' && !useSoftFloat()) {
    if (Constraint[1] == 'f') {
      if (useSoftFloat())
        return std::make_pair(
            0u, static_cast<const TargetRegisterClass *>(nullptr));
      if (VT == MVT::f32)
        return parseRegisterNumber(Constraint, &SystemZ::FP32BitRegClass,
                                   SystemZMC::FP32Regs, 16);
@@ -1174,6 +1177,9 @@ SystemZTargetLowering::getRegForInlineAsmConstraint(
                                 SystemZMC::FP64Regs, 16);
    }
    if (Constraint[1] == 'v') {
      if (!Subtarget.hasVector())
        return std::make_pair(
            0u, static_cast<const TargetRegisterClass *>(nullptr));
      if (VT == MVT::f32)
        return parseRegisterNumber(Constraint, &SystemZ::VR32BitRegClass,
                                   SystemZMC::VR32Regs, 32);
+10 −0
Original line number Diff line number Diff line
; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -mattr=soft-float -O3 2>&1 | FileCheck %s
;
; Verify that inline asms cannot use fp/vector registers with soft-float.

define <2 x i64> @f1() {
  %ret = call <2 x i64> asm "", "={v0}" ()
  ret <2 x i64> %ret
}

; CHECK: error: couldn't allocate output register for constraint '{v0}'