Commit 77cc690b authored by Tim Northover's avatar Tim Northover
Browse files

AArch64: fix bitcode upgrade of @llvm.neon.addp.

We were upgrading it to faddp, but a version taking two type parameters instead
of one. This then got upgraded a second time to the version with just one
parameter, but occasionally (for reasons I don't understand) this unusual
two-stage process corrupted a use-list, leading to a crash when the two faddp
declarations didn't match.
parent cfe2fab7
Loading
Loading
Loading
Loading
+3 −4
Original line number Diff line number Diff line
@@ -585,11 +585,10 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
    if (Name.startswith("aarch64.neon.addp")) {
      if (F->arg_size() != 2)
        break; // Invalid IR.
      auto fArgs = F->getFunctionType()->params();
      VectorType *ArgTy = dyn_cast<VectorType>(fArgs[0]);
      if (ArgTy && ArgTy->getElementType()->isFloatingPointTy()) {
      VectorType *Ty = dyn_cast<VectorType>(F->getReturnType());
      if (Ty && Ty->getElementType()->isFloatingPointTy()) {
        NewFn = Intrinsic::getDeclaration(F->getParent(),
                                          Intrinsic::aarch64_neon_faddp, fArgs);
                                          Intrinsic::aarch64_neon_faddp, Ty);
        return true;
      }
    }
+1.11 KiB

File added.

No diff preview for this file type.

+18 −0
Original line number Diff line number Diff line
; RUN: llvm-dis %p/aarch64-addp-upgrade.bc -o - | FileCheck %s

; Bitcode was generated from file below, which may or may not even assemble any
; more.

; CHECK: call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
define <2 x float> @test_addp(<2 x float> %lhs, <2 x float> %rhs) {
  %res = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
  ret <2 x float> %res
}

; CHECK: call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
define <2 x float> @test_addp1(<2 x float> %lhs, <2 x float> %rhs) {
  %res = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
  ret <2 x float> %res
}

declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>)