GitLab

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Alex McCaskey <mccaskeyaj@ornl.gov>

Testing non-conventional gate set.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

The procedure was not properly taking into account non-IBM gateset, i.e., 2-q gates may not be CNOT.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

I realized that this was buried in an ExaTN-visitor only folder. This made it unusable for others such as ITensor (when users don't compile w/ ExaTN)
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

It skipped the init call...
Use Immediately invoke lambda init instead.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Alex McCaskey <mccaskeyaj@ornl.gov>

Signed-off-by: Alex McCaskey <mccaskeyaj@ornl.gov>

adding qsearch irtransformation, added get_or_default method to heterogeneous map, update qite to allow circuit optimizers as input
Signed-off-by: Alex McCaskey <mccaskeyaj@ornl.gov>

The tracking map for phase-poly optimization loop was placed at a wrong scope hence was not cleared appropriately.

Add some verbose logging to assist debugging in the future.

Also, add a unit test case for the reported case.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Tyler reported a case where the circuit after optimized used the qreg name 'q' rather than a random buffer name that qcor assigned.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Typo in IR construction but not in validation code hence can escape all the asserts in Kak.

Updated the gate merging unit test which uses KAK to be more rigorous in catching these potential bugs.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

The order of bit indices must match the matrix representation of the controlled gate.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

The gates were inserted in reverse order :(
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

There is some potential compatibility issues with external linkage.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

- CZ gate def: required bits = 2.

- KAK: fixed numerical errors related to tolerance, added validation checks for simplified circuits.

- Gate merge: fixed endians, added validation.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Optimized block == rest of circuit.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Used it in the optimization routine.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Daniel Claudino <6d3@ornl.gov>

Signed-off-by: Daniel Claudino <6d3@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Alex McCaskey <mccaskeyaj@ornl.gov>

Added the full OpenPulse Json to the dict/map that the IR transformation sends on to the Pulse Optimizer

This provides probably enough information for any potential implementations in the future.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Completed the prototype interface for Python pulse optimization impl

There is a skeleton/boilerplate pulse_optimizer.py for reference and an example pulse_or_transform.py.

- Implemented the GRAPE method.

- Surfaced the IR Transformation service.

- Added a simple unit test.

This commit is combined from commits from working branch. I forgot to sign off on one commit.

Tested by: unit testing here and unit testing + example on QuaC
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Finish an initial working prototype:
(1) Calculate the overall U matrix
(2) Construct params to run quantum optimal control
(3) Transform the Composite instruction accordingly

Need to add a way to pass target U as STL containers to prevent heterogenous map look-up failure w/ Eigen container.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

- Added impls for all supported gates.

- Added a missing (TODO item) unit test check.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

It is contributed to XACC at runtime.
Add some simple tests to verify basic functionality. Will add more tests and complete impls for all basic gates.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

This is developed in parallel w/ another feature branch in QuaC.

High-level flow: this pulse-level IR Transform plugin will retrieve system dynamics from a pulse-capable backend (e.g. QuaC) then using XACC quantum optimal control to perform pulse optimization.

Target unitary will be derived from the XACC side (i.e. here) so that it is independent from backends.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

Signed-off-by: Alex McCaskey <mccaskeyaj@ornl.gov>

The (X, Rz, CNOT) sub-circuit discovery code has bugs which may identify wrong boundaries.

Tested by: reproducing the assert in https://github.com/eclipse/xacc/issues/160

, no longer asserting after the fix; circuit optimization unit testing is passing.
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

This is the optimization routine #4 in https://arxiv.org/pdf/1710.07345.pdf



Basically, it's a 3-step process:

- Identify the subcircuit (only contains X, CNOT, or Rz gates)
(this includes circuit pruning)

- Find the boolean polynomials for each Rz gate.

- Merge those Rz gates that have the same boolean polynomial.

Also, added unit tests to check the execution.

Fixed IRToGraph visitor to handle Identity gate and to output error if it encounters an unknown gate. This prevents it from silently ignoring those unknown gates (could create mismatches between graph and circuit views)
Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>