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- 04 Oct, 2021 1 commit
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 22 Sep, 2021 1 commit
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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- 21 Sep, 2021 1 commit
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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- 05 Sep, 2021 1 commit
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Adams, Austin Joel authored
As a result of XACC IR being serialized, it's possible to have gates follow Measure instructions without the circuit truly having post-measure gates. For example: H 0 Measure 0 H 1 Measure 1 In cases like that, the current QppAccelerator decides it cannot simulate the circuit once and repeatedly sample the resulting state vector to simulate "runs." That is an overzealous judgment, since none of the gates that follow the Measure instructions actually depend on the results of measurements. So instead, in the QppAccelerator logic detecting post-measurement gates, track which qubits have been measured, and only report post-measurement gates if it sees a gate operating on a qubit with an earlier Measure instruction. Signed-off-by:
Austin Adams <aja@gatech.edu>
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- 25 Aug, 2021 1 commit
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 24 Aug, 2021 1 commit
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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- 23 Aug, 2021 2 commits
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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- 20 Aug, 2021 3 commits
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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Nguyen, Thien Minh authored
Note: Aer can simulate conditional (bfunc) in the QObj and XACC translate IfStmt to bfunc appropriately. Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 17 Aug, 2021 3 commits
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Nguyen, Thien Minh authored
Testing non-conventional gate set. Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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https://github.com/eclipse/xacc/issues/478Nguyen, Thien Minh authored
The procedure was not properly taking into account non-IBM gateset, i.e., 2-q gates may not be CNOT. Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 16 Aug, 2021 3 commits
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Adams, Austin Joel authored
Remove SWAP gates from the two-qubit gate whitelist for Staq placement also modified in f1eedf04. Otherwise, Swap instructions between non-adjacent qubits can slip through the swap-shortest-path IRTransformation. An example of this would be the QCOR qft() routine, which can generate a Swap between far-away qubits at the end. Combined with f1eedf04 , fixes ORNL-QCI/qcor#199. Signed-off-by:
Austin Adams <aja@gatech.edu>
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Nguyen, Thien Minh authored
Creg can be larger than qreg (e.g., IQPE) and need to handle explicit Measure assignment. Tested by: validating with Honeywell APIVAL Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
XACCToStaqOpenQASM visitor to handle IfStmt (currently empty impl) Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 09 Aug, 2021 5 commits
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Handle single-cbit conditional for OpenQASM code gen. Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 06 Aug, 2021 3 commits
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 04 Aug, 2021 1 commit
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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- 30 Jul, 2021 1 commit
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Adams, Austin Joel authored
In the IBM backend, we require [x, y] to exist in the coupling map to execute CX x,y -- [y, x] in the coupling map is not enough. So when IBM does not include a coupling_map for a given backend, we need to include both [i,j] and [j,i] for all qubits i,j s.t. i != j in the coupling map we create; currently, we only include [i,j] for all qubits i,j with i < j, which will cause errors if a circuit includes CX j,i. Signed-off-by:
Austin Adams <aja@gatech.edu>
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- 21 Jul, 2021 1 commit
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Nguyen, Thien Minh authored
This is problematic when there is a U3 gate: it will create a Ry with string param, then revisit. Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 12 Jul, 2021 1 commit
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Mccaskey, Alex authored
Fix bug where IBM remote simulators not added to available backends. Configure IonQ backend to retrieve backend connectivity Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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- 09 Jul, 2021 1 commit
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Nguyen, Thien Minh authored
Also, fixed a compile issue w/ Clang. Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 30 Jun, 2021 3 commits
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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Mccaskey, Alex authored
Signed-off-by:
Alex McCaskey <mccaskeyaj@ornl.gov>
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- 11 Jun, 2021 4 commits
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Note: need to figure out how to deal w/ gradients in this case. Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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Nguyen, Thien Minh authored
Signed-off-by:
Thien Nguyen <nguyentm@ornl.gov>
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- 08 Jun, 2021 2 commits
- 03 Jun, 2021 1 commit