adding iswap and fsim gates to ir

Signed-off-by: Alex McCaskey <mccaskeyaj@ornl.gov>

quantum/gate/GateQuantumActivator.cpp

@@ -49,6 +49,8 @@ public:
     auto y = std::make_shared<xacc::quantum::Y>();
     auto z = std::make_shared<xacc::quantum::Z>();
     auto sw = std::make_shared<xacc::quantum::Swap>();
+    auto isw = std::make_shared<xacc::quantum::iSwap>();
+    auto fsim = std::make_shared<xacc::quantum::fSim>();
     auto u = std::make_shared<xacc::quantum::U>();
     auto anneal = std::make_shared<xacc::quantum::AnnealingInstruction>();
 
@@ -79,6 +81,8 @@ public:
     context.RegisterService<xacc::Instruction>(y);
     context.RegisterService<xacc::Instruction>(z);
     context.RegisterService<xacc::Instruction>(sw);
+    context.RegisterService<xacc::Instruction>(isw);
+    context.RegisterService<xacc::Instruction>(fsim);
     context.RegisterService<xacc::Instruction>(u);
     context.RegisterService<xacc::Instruction>(ifstmt);
     context.RegisterService<xacc::Instruction>(anneal);

quantum/gate/ir/CommonGates.hpp

@@ -20,6 +20,40 @@
 namespace xacc {
 namespace quantum {
 
+class iSwap : public Gate {
+public:
+  iSwap() : Gate("iSwap") {}
+
+  iSwap(std::size_t controlQubit, std::size_t targetQubit)
+      : Gate("iSwap", std::vector<std::size_t>{controlQubit, targetQubit},
+             std::vector<InstructionParameter>{}) {}
+
+  iSwap(std::vector<std::size_t> qbits)
+      : Gate("iSwap", qbits, std::vector<InstructionParameter>{}) {}
+  const int nRequiredBits() const override { return 2; }
+
+  DEFINE_CLONE(iSwap)
+  DEFINE_VISITABLE()
+};
+
+class fSim : public Gate {
+public:
+  fSim() : Gate("fSim",std::vector<InstructionParameter>{0.0,0.0}) {}
+  fSim(std::size_t controlQubit, std::size_t targetQubit)
+      : Gate("fSim", std::vector<std::size_t>{controlQubit, targetQubit},
+             std::vector<InstructionParameter>{0.0, 0.0}) {}
+  fSim(std::size_t controlQubit, std::size_t targetQubit, double theta,
+       double phi)
+      : Gate("fSim", std::vector<std::size_t>{controlQubit, targetQubit},
+             std::vector<InstructionParameter>{theta, phi}) {}
+  fSim(std::vector<std::size_t> qbits)
+      : Gate("fSim", qbits, std::vector<InstructionParameter>{0.0,0.0}) {}
+  const int nRequiredBits() const override { return 2; }
+
+  DEFINE_CLONE(fSim)
+  DEFINE_VISITABLE()
+};
+
 class IfStmt : public Circuit {
 protected:
   std::string bufferName;
@@ -140,7 +174,7 @@ public:
       qbits.push_back(bts[0]);
       qbits.push_back(bts[0]);
     } else {
-        qbits = bts;
+      qbits = bts;
     }
   }
   const int nRequiredBits() const override { return 2; }

quantum/gate/utils/AllGateVisitor.hpp

@@ -31,6 +31,8 @@ class AllGateVisitor : public BaseInstructionVisitor,
                        public InstructionVisitor<Z>,
                        public InstructionVisitor<CPhase>,
                        public InstructionVisitor<Swap>,
+                       public InstructionVisitor<iSwap>,
+                       public InstructionVisitor<fSim>,
                        public InstructionVisitor<Measure>,
                        public InstructionVisitor<Identity>,
                        public InstructionVisitor<CZ>,
@@ -78,6 +80,8 @@ public:
     visit(c3);
   }
 
+  void visit(fSim& fsim) override {}
+  void visit(iSwap& isw) override {}
   void visit(CRZ &crz) override {}
   void visit(CH &ch) override {}
   void visit(S &s) override {}

quantum/plugins/xasm/tests/XASMCompilerTester.cpp

@@ -22,6 +22,26 @@
 
 #include "Circuit.hpp"
 
+TEST(XASMCompilerTester, checkISwapAndFSim) {
+
+  auto compiler = xacc::getCompiler("xasm");
+  auto IR = compiler->compile(R"(__qpu__ void iswap_test(qbit q, double x, double y) {
+  H(q[0]);
+  iSwap(q[0], q[1]);
+  fSim(q[0], q[1], x, y);
+  CX(q[0], q[1]);
+})");
+
+auto kernel = IR->getComposites()[0];
+
+
+  std::cout << "HELLO: " << kernel->toString() << "\n";
+
+  std::cout << kernel->operator()({2.2,3.3})->toString() << "\n";
+
+
+}
+
 TEST(XASMCompilerTester, checkTranslate) {
   auto compiler = xacc::getCompiler("xasm");
   auto IR = compiler->compile(R"(__qpu__ void bell_test(qbit q, double t0) {
@@ -450,7 +470,6 @@ TEST(XASMCompilerTester, checkIRV3Vector) {
   std::cout << " HELLO: " << test->toString() << "\n";
 }
 
-
 TEST(XASMCompilerTester, checkIRV3Expression) {
   //   auto v = xacc::qalloc(1);
   //   v->setName("v");
@@ -476,10 +495,8 @@ TEST(XASMCompilerTester, checkIRV3Expression) {
 
     std::cout << foo_test->toString() << "\n\n";
   }
-
 }
 
-
 TEST(XASMCompilerTester, checkAnnealInstructions) {
   xacc::internal_compiler::qreg v(1);
 
@@ -517,8 +534,6 @@ TEST(XASMCompilerTester, checkAnnealInstructions) {
   test->updateRuntimeArguments(v, std::vector<double>{.48, .58, .68});
   std::cout << " HELLO: " << test->toString() << "\n";
 
-
-
   IR = compiler->compile(
       R"(
   __qpu__ void rbm_test(qreg v, std::vector<double> x, int nv, int nh) {
@@ -527,10 +542,10 @@ TEST(XASMCompilerTester, checkAnnealInstructions) {
 )");
   test = IR->getComposites()[0];
 
-  for (int i = 1; i < 4; i++ ) {
-//   std::cout << " HELLO: " << test->toString() << "\n";
-  test->updateRuntimeArguments(v, std::vector<double>(i*i + i + i), i, i);
-  std::cout << " HELLO:\n" << test->toString() << "\n";
+  for (int i = 1; i < 4; i++) {
+    //   std::cout << " HELLO: " << test->toString() << "\n";
+    test->updateRuntimeArguments(v, std::vector<double>(i * i + i + i), i, i);
+    std::cout << " HELLO:\n" << test->toString() << "\n";
   }
 }