Commits · 2f50208f82fcdbf932c885fec47ee6bf79e5c652 · ORNL Quantum Computing Institute / qcor

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03 Nov, 2021 1 commit

Added python example for mirror circuit validation mode · 2f50208f

Nguyen, Thien Minh authored Nov 03, 2021



- Reduce default number of runs for smaller circuits.

- Reduce debug logging.

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

2f50208f

12 Oct, 2021 1 commit
- Fixed Clang build · ee0259d8
  Nguyen, Thien Minh authored Oct 12, 2021
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Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>
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  ee0259d8
07 Oct, 2021 1 commit
- adding license info to all source files · 9fe3c136
  Mccaskey, Alex authored Oct 07, 2021
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Signed-off-by: Alex McCaskey <mccaskeyaj@ornl.gov>
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  9fe3c136
15 Sep, 2021 4 commits

Wrapping up mirror circuit impl · 68b175e4

Nguyen, Thien Minh authored Sep 15, 2021

As the first prototype, I only expose a single flag to enable validation if NISQ kernel execution.

If enabled, kernel execution (NISQ) will be accompanied by Pauli-randomized mirror circuits to determine if the backend can produce the expected readout.

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

68b175e4

Properly handle bit order in the result and adding a test for noisy validation · 78922f6d
Nguyen, Thien Minh authored Sep 15, 2021
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Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>
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78922f6d
Added a runtime hook to connect use the mirror circuit validation · ef7e3a54
Nguyen, Thien Minh authored Sep 15, 2021
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Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>
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ef7e3a54

Clean up the implementation of circuit mirroring · fd2bca29

Nguyen, Thien Minh authored Sep 15, 2021



support all gate types and add a deuteron ansatz check

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>

fd2bca29

14 Sep, 2021 5 commits
- Support arbitrary rotation gates in circuit mirror · 718d7774
  Nguyen, Thien Minh authored Sep 14, 2021
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Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>
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  718d7774
- Handle clifford gates · 09cc54bc
  Nguyen, Thien Minh authored Sep 14, 2021
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Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>
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  09cc54bc
- Added debug logging · c5e99b56
  Nguyen, Thien Minh authored Sep 14, 2021
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Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>
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  c5e99b56
- Fixed s matrix initialization: forgot to initialize it to identity · 63fc8f10
  Nguyen, Thien Minh authored Sep 14, 2021
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Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>
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  63fc8f10
- Work on mirror circuit impl · 581a7d40
  Nguyen, Thien Minh authored Sep 14, 2021
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Fix eigen indexing and add missing u3 inverse

Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>
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  581a7d40
13 Sep, 2021 1 commit
- Port the main mirror circuit gen · 44c0b871
  Nguyen, Thien Minh authored Sep 13, 2021
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Signed-off-by: Thien Nguyen <nguyentm@ornl.gov>
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  44c0b871