Loading lib/systems/architectures.nix +148 −121 Original line number Diff line number Diff line Loading @@ -339,7 +339,11 @@ rec { }; # a superior CPU has all the features of an inferior and is able to build and test code for it inferiors = { inferiors = let withInferiors = archs: lib.unique (archs ++ lib.flatten (lib.attrVals archs inferiors)); in { # x86_64 Generic default = [ ]; x86-64 = [ ]; Loading Loading @@ -460,6 +464,29 @@ rec { ); "armv9.4-a" = [ "armv9.3-a" ] ++ inferiors."armv9.3-a"; # ARM cortex-a53 = [ "armv8-a" ]; cortex-a72 = [ "armv8-a" ]; cortex-a55 = [ "armv8.2-a" "cortex-a53" "cortex-a72" ] ++ inferiors."armv8.2-a"; cortex-a76 = [ "armv8.2-a" "cortex-a53" "cortex-a72" ] ++ inferiors."armv8.2-a"; # Ampere ampere1 = withInferiors [ "armv8.6-a" "cortex-a55" "cortex-a76" ]; ampere1a = [ "ampere1" ] ++ inferiors.ampere1; ampere1b = [ "ampere1a" ] ++ inferiors.ampere1a; # other armv5te = [ ]; armv6 = [ ]; Loading Loading
lib/systems/architectures.nix +148 −121 Original line number Diff line number Diff line Loading @@ -339,7 +339,11 @@ rec { }; # a superior CPU has all the features of an inferior and is able to build and test code for it inferiors = { inferiors = let withInferiors = archs: lib.unique (archs ++ lib.flatten (lib.attrVals archs inferiors)); in { # x86_64 Generic default = [ ]; x86-64 = [ ]; Loading Loading @@ -460,6 +464,29 @@ rec { ); "armv9.4-a" = [ "armv9.3-a" ] ++ inferiors."armv9.3-a"; # ARM cortex-a53 = [ "armv8-a" ]; cortex-a72 = [ "armv8-a" ]; cortex-a55 = [ "armv8.2-a" "cortex-a53" "cortex-a72" ] ++ inferiors."armv8.2-a"; cortex-a76 = [ "armv8.2-a" "cortex-a53" "cortex-a72" ] ++ inferiors."armv8.2-a"; # Ampere ampere1 = withInferiors [ "armv8.6-a" "cortex-a55" "cortex-a76" ]; ampere1a = [ "ampere1" ] ++ inferiors.ampere1; ampere1b = [ "ampere1a" ] ++ inferiors.ampere1a; # other armv5te = [ ]; armv6 = [ ]; Loading