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xen: patch with XSA-480
Xen Security Advisory CVE-2026-23554 / XSA-480
version 3
Use after free of paging structures in EPT
The Intel EPT paging code uses an optimization to defer flushing of any cached
EPT state until the p2m lock is dropped, so that multiple modifications done
under the same locked region only issue a single flush.
Freeing of paging structures however is not deferred until the flushing is
done, and can result in freed pages transiently being present in cached state.
Such stale entries can point to memory ranges not owned by the guest, thus
allowing access to unintended memory regions.
Privilege escalation, Denial of Service (DoS) affecting the entire host,
and information leaks are possible impacts of this vulnerability.
Signed-off-by:
Fernando Rodrigues <alpha@sigmasquadron.net>