Unverified Commit 359e1136 authored by Artturi's avatar Artturi Committed by GitHub
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Merge pull request #239120 from LibreCybernetics/arch-stuff

parents f45f7286 79dfc50b

lib/systems/architectures.nix

+28 −11
Original line number Diff line number Diff line
@@ -3,8 +3,15 @@ 
rec {

  # gcc.arch to its features (as in /proc/cpuinfo)

  features = {

    # x86_64 Generic

    # Spec: https://gitlab.com/x86-psABIs/x86-64-ABI/

    default        = [ ];

    x86-64         = [ ];

    x86-64-v2      = [ "sse3" "ssse3" "sse4_1" "sse4_2"                                                  ];

    x86-64-v3      = [ "sse3" "ssse3" "sse4_1" "sse4_2"               "avx" "avx2"          "fma"        ];

    x86-64-v4      = [ "sse3" "ssse3" "sse4_1" "sse4_2"               "avx" "avx2" "avx512" "fma"        ];

    # x86_64 Intel

    nehalem        = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes"                                    ];

    westmere       = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes"                                    ];

    sandybridge    = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx"                              ];

    ivybridge      = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx"                              ];
@@ -41,22 +48,32 @@ rec { 


  # a superior CPU has all the features of an inferior and is able to build and test code for it

  inferiors = {

    # x86_64 Generic

    default   = [ ];

    x86-64    = [ ];

    x86-64-v2 = [ "x86-64"    ];

    x86-64-v3 = [ "x86-64-v2" ] ++ inferiors.x86-64-v2;

    x86-64-v4 = [ "x86-64-v3" ] ++ inferiors.x86-64-v3;



    # x86_64 Intel

    # https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html

    default        = [ ];

    westmere       = [ ];

    nehalem        = [ "x86-64-v2"   ] ++ inferiors.x86-64-v2;

    westmere       = [ "nehalem"     ] ++ inferiors.nehalem;

    sandybridge    = [ "westmere"    ] ++ inferiors.westmere;

    ivybridge      = [ "sandybridge" ] ++ inferiors.sandybridge;

    haswell        = [ "ivybridge"      ] ++ inferiors.ivybridge;



    haswell        = lib.unique ([ "ivybridge" "x86-64-v3" ] ++ inferiors.ivybridge ++ inferiors.x86-64-v3);

    broadwell      = [ "haswell"   ] ++ inferiors.haswell;

    skylake        = [ "broadwell" ] ++ inferiors.broadwell;

    skylake-avx512 = [ "skylake"        ] ++ inferiors.skylake;



    skylake-avx512 = lib.unique ([ "skylake" "x86-64-v4" ] ++ inferiors.skylake ++ inferiors.x86-64-v4);

    cannonlake     = [ "skylake-avx512" ] ++ inferiors.skylake-avx512;

    icelake-client = [ "cannonlake"     ] ++ inferiors.cannonlake;

    icelake-server = [ "icelake-client" ] ++ inferiors.icelake-client;

    cascadelake    = [ "skylake-avx512" ] ++ inferiors.cannonlake;

    cascadelake    = [ "cannonlake"     ] ++ inferiors.cannonlake;

    cooperlake     = [ "cascadelake"    ] ++ inferiors.cascadelake;

    tigerlake      = [ "icelake-server" ] ++ inferiors.icelake-server;



    # CX16 does not exist on alderlake, while it does on nearly all other intel CPUs

    alderlake      = [ ];
@@ -87,10 +104,10 @@ rec { 
    # https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html

    # https://en.wikichip.org/wiki/amd/microarchitectures/zen

    # https://en.wikichip.org/wiki/intel/microarchitectures/skylake

    znver1         = [ "skylake" ] ++ inferiors.skylake;

    znver1         = [ "skylake" ] ++ inferiors.skylake; # Includes haswell and x86-64-v3

    znver2         = [ "znver1"  ] ++ inferiors.znver1;

    znver3         = [ "znver2"  ] ++ inferiors.znver2;

    znver4         = [ "znver3"  ] ++ inferiors.znver3;

    znver4         = lib.unique ([ "znver3" "x86-64-v4" ] ++ inferiors.znver3 ++ inferiors.x86-64-v4);



    # other

    armv5te        = [ ];

pkgs/build-support/cc-wrapper/default.nix

+14 −2
Original line number Diff line number Diff line
@@ -106,7 +106,12 @@ let 
  isGccArchSupported = arch:

    if targetPlatform.isPower then false else # powerpc does not allow -march=

    if isGNU then

      { # Intel

      { # Generic

        x86-64-v2 = versionAtLeast ccVersion "11.0";

        x86-64-v3 = versionAtLeast ccVersion "11.0";

        x86-64-v4 = versionAtLeast ccVersion "11.0";



        # Intel

        skylake        = versionAtLeast ccVersion "6.0";

        skylake-avx512 = versionAtLeast ccVersion "6.0";

        cannonlake     = versionAtLeast ccVersion "8.0";
@@ -117,6 +122,7 @@ let 
        tigerlake      = versionAtLeast ccVersion "10.0";

        knm            = versionAtLeast ccVersion "8.0";

        alderlake      = versionAtLeast ccVersion "12.0";



        # AMD

        znver1         = versionAtLeast ccVersion "6.0";

        znver2         = versionAtLeast ccVersion "9.0";
@@ -124,12 +130,18 @@ let 
        znver4         = versionAtLeast ccVersion "13.0";

      }.${arch} or true

    else if isClang then

      { # Intel

      { #Generic

        x86-64-v2 = versionAtLeast ccVersion "12.0";

        x86-64-v3 = versionAtLeast ccVersion "12.0";

        x86-64-v4 = versionAtLeast ccVersion "12.0";



        # Intel

        cannonlake     = versionAtLeast ccVersion "5.0";

        icelake-client = versionAtLeast ccVersion "7.0";

        icelake-server = versionAtLeast ccVersion "7.0";

        knm            = versionAtLeast ccVersion "7.0";

        alderlake      = versionAtLeast ccVersion "16.0";



        # AMD

        znver1         = versionAtLeast ccVersion "4.0";

        znver2         = versionAtLeast ccVersion "9.0";