Commit ffa29fd9 authored by Hans Wennborg's avatar Hans Wennborg
Browse files

Merging r368324: 

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r368324 | ctopper | 2019-08-08 20:11:17 +0200 (Thu, 08 Aug 2019) | 7 lines

[X86] Make CMPXCHG16B feature imply CMPXCHG8B feature.

This fixes znver1 so that it properly enables CMPXHG8B. We can
probably remove explicit CMPXCHG8B from CPUs that also have
CMPXCHG16B, but keeping this simple to allow cherry pick to 9.0.

Fixes PR42935.
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llvm-svn: 368423
parent 87e914c5

llvm/lib/Target/X86/X86.td

+2 −1
Original line number Diff line number Diff line
@@ -95,7 +95,8 @@ def Feature3DNowA : SubtargetFeature<"3dnowa", "X863DNowLevel", "ThreeDNowA", 
def Feature64Bit   : SubtargetFeature<"64bit", "HasX86_64", "true",

                                      "Support 64-bit instructions">;

def FeatureCMPXCHG16B : SubtargetFeature<"cx16", "HasCmpxchg16b", "true",

                                      "64-bit with cmpxchg16b">;

                                      "64-bit with cmpxchg16b",

                                      [FeatureCMPXCHG8B]>;

def FeatureSlowSHLD : SubtargetFeature<"slow-shld", "IsSHLDSlow", "true",

                                       "SHLD instruction is slow">;

def FeatureSlowPMULLD : SubtargetFeature<"slow-pmulld", "IsPMULLDSlow", "true",

llvm/test/CodeGen/X86/cmpxchg8b.ll

+1 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
; RUN: llc < %s -mtriple=i686-unknown- -mcpu=core2 | FileCheck %s --check-prefixes=CHECK,X86

; RUN: llc < %s -mtriple=x86_64-unknown- -mcpu=core2 | FileCheck %s --check-prefixes=CHECK,X64

; RUN: llc < %s -mtriple=i686-unknown- -mcpu=i486 | FileCheck %s --check-prefixes=I486

; RUN: llc < %s -mtriple=i686-unknown- -mcpu=znver1 | FileCheck %s --check-prefixes=CHECK,X86



; Basic 64-bit cmpxchg

define void @t1(i64* nocapture %p) nounwind ssp {