Commit fb87eeb3 authored by Volkan Keles's avatar Volkan Keles
Browse files

GlobalISel: IRTranslate llvm.fabs.* intrinsic

Summary:
Fabs is a common floating-point operation, especially for some expansions. This patch adds
a new generic opcode for llvm.fabs.* intrinsic in order to avoid building/matching this intrinsic.

Reviewers: qcolombet, aditya_nandakumar, dsanders, rovka

Reviewed By: aditya_nandakumar

Subscribers: kristof.beyls, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D43864
parent 433f703f
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+5 −0
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@@ -286,6 +286,11 @@ m_GFPTrunc(const SrcTy &Src) {
  return UnaryOp_match<SrcTy, TargetOpcode::G_FPTRUNC>(Src);
}

template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_FABS> m_GFabs(const SrcTy &Src) {
  return UnaryOp_match<SrcTy, TargetOpcode::G_FABS>(Src);
}

template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::COPY> m_Copy(SrcTy &&Src) {
  return UnaryOp_match<SrcTy, TargetOpcode::COPY>(std::forward<SrcTy>(Src));
+3 −0
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@@ -427,6 +427,9 @@ HANDLE_TARGET_OPCODE(G_SITOFP)
/// Generic unsigned-int to float conversion
HANDLE_TARGET_OPCODE(G_UITOFP)

/// Generic FP absolute value.
HANDLE_TARGET_OPCODE(G_FABS)

/// Generic pointer offset
HANDLE_TARGET_OPCODE(G_GEP)

+6 −0
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@@ -378,6 +378,12 @@ def G_UITOFP : GenericInstruction {
  let hasSideEffects = 0;
}

def G_FABS : GenericInstruction {
  let OutOperandList = (outs type0:$dst);
  let InOperandList = (ins type0:$src);
  let hasSideEffects = 0;
}

//------------------------------------------------------------------------------
// Floating Point Binary ops.
//------------------------------------------------------------------------------
+5 −0
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@@ -746,6 +746,11 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
        .addDef(getOrCreateVReg(CI))
        .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
    return true;
  case Intrinsic::fabs:
    MIRBuilder.buildInstr(TargetOpcode::G_FABS)
        .addDef(getOrCreateVReg(CI))
        .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
    return true;
  case Intrinsic::fma:
    MIRBuilder.buildInstr(TargetOpcode::G_FMA)
        .addDef(getOrCreateVReg(CI))
+11 −0
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@@ -1318,6 +1318,17 @@ define float @test_log2_intrin(float %a) {
  %res = call float @llvm.log2.f32(float %a)
  ret float %res
}

declare float @llvm.fabs.f32(float)
define float @test_fabs_intrin(float %a) {
; CHECK-LABEL: name: test_fabs_intrin
; CHECK: [[A:%[0-9]+]]:_(s32) = COPY $s0
; CHECK: [[RES:%[0-9]+]]:_(s32) = G_FABS [[A]]
; CHECK: $s0 = COPY [[RES]]
  %res = call float @llvm.fabs.f32(float %a)
  ret float %res
}

declare void @llvm.lifetime.start.p0i8(i64, i8*)
declare void @llvm.lifetime.end.p0i8(i64, i8*)
define void @test_lifetime_intrin() {
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