Commit f9b2580a authored by Tanya Lattner's avatar Tanya Lattner
Browse files

Merge from mainline. 

Tevert part of the x86 subtarget logic changes: when -march=x86-64
is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.

This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.

llvm-svn: 63792
parent 56671009

llvm/lib/Target/X86/X86Subtarget.cpp

+5 −4
Original line number Diff line number Diff line
@@ -327,15 +327,16 @@ X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit) 
  } else {

    // Otherwise, use CPUID to auto-detect feature set.

    AutoDetectSubtargetFeatures();

    // If requesting codegen for X86-64, make sure that 64-bit features

    // are enabled.

    if (Is64Bit)

      HasX86_64 = true;

    // Make sure SSE2 is enabled; it is available on all X86-64 CPUs.

    if (Is64Bit && X86SSELevel < SSE2)

      X86SSELevel = SSE2;

  }



  // If requesting codegen for X86-64, make sure that 64-bit features

  // are enabled.

  if (Is64Bit)

    HasX86_64 = true;



  DOUT << "Subtarget features: SSELevel " << X86SSELevel

       << ", 3DNowLevel " << X863DNowLevel

       << ", 64bit " << HasX86_64 << "\n";