Commit f586fd44 authored by Craig Topper's avatar Craig Topper
Browse files

[FPEnv] [PowerPC] Lowering ppc_fp128 StrictFP Nodes to libcalls 

This is an alternative to D64662 that shares more code between
strict and non-strict nodes. It's modeled after the implementation
that I did for softening.

Differential Revision: https://reviews.llvm.org/D70867
parent da7b129b

llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

+245 −181

File changed.

Preview size limit exceeded, changes collapsed.

llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp

+0 −26
Original line number Diff line number Diff line
@@ -974,32 +974,6 @@ SDValue DAGTypeLegalizer::JoinIntegers(SDValue Lo, SDValue Hi) { 
  return DAG.getNode(ISD::OR, dlHi, NVT, Lo, Hi);

}



/// Convert the node into a libcall with the same prototype.

SDValue DAGTypeLegalizer::LibCallify(RTLIB::Libcall LC, SDNode *N,

                                     bool isSigned) {

  TargetLowering::MakeLibCallOptions CallOptions;

  CallOptions.setSExt(isSigned);

  unsigned NumOps = N->getNumOperands();

  SDLoc dl(N);

  if (NumOps == 0) {

    return TLI.makeLibCall(DAG, LC, N->getValueType(0), None, CallOptions,

                           dl).first;

  } else if (NumOps == 1) {

    SDValue Op = N->getOperand(0);

    return TLI.makeLibCall(DAG, LC, N->getValueType(0), Op, CallOptions,

                           dl).first;

  } else if (NumOps == 2) {

    SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };

    return TLI.makeLibCall(DAG, LC, N->getValueType(0), Ops, CallOptions,

                           dl).first;

  }

  SmallVector<SDValue, 8> Ops(NumOps);

  for (unsigned i = 0; i < NumOps; ++i)

    Ops[i] = N->getOperand(i);



  return TLI.makeLibCall(DAG, LC, N->getValueType(0), Ops, CallOptions, dl).first;

}



/// Promote the given target boolean to a target boolean of the given type.

/// A target boolean is an integer value, not necessarily of type i1, the bits

/// of which conform to getBooleanContents.

llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h

+4 −1
Original line number Diff line number Diff line
@@ -215,7 +215,6 @@ private: 
  SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);



  SDValue JoinIntegers(SDValue Lo, SDValue Hi);

  SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned);



  std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
@@ -560,6 +559,10 @@ private: 
  // Float Result Expansion.

  void ExpandFloatResult(SDNode *N, unsigned ResNo);

  void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi);

  void ExpandFloatRes_Unary(SDNode *N, RTLIB::Libcall LC,

                            SDValue &Lo, SDValue &Hi);

  void ExpandFloatRes_Binary(SDNode *N, RTLIB::Libcall LC,

                             SDValue &Lo, SDValue &Hi);

  void ExpandFloatRes_FABS      (SDNode *N, SDValue &Lo, SDValue &Hi);

  void ExpandFloatRes_FMINNUM   (SDNode *N, SDValue &Lo, SDValue &Hi);

  void ExpandFloatRes_FMAXNUM   (SDNode *N, SDValue &Lo, SDValue &Hi);

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

+34 −2
Original line number Diff line number Diff line
@@ -7322,8 +7322,40 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, 
  if (VTList.NumVTs == 1)

    return getNode(Opcode, DL, VTList.VTs[0], Ops);



#if 0

  switch (Opcode) {

  case ISD::STRICT_FP_EXTEND:

    assert(VTList.NumVTs == 2 && Ops.size() == 2 &&

           "Invalid STRICT_FP_EXTEND!");

    assert(VTList.VTs[0].isFloatingPoint() &&

           Ops[1].getValueType().isFloatingPoint() && "Invalid FP cast!");

    assert(VTList.VTs[0].isVector() == Ops[1].getValueType().isVector() &&

           "STRICT_FP_EXTEND result type should be vector iff the operand "

           "type is vector!");

    assert((!VTList.VTs[0].isVector() ||

            VTList.VTs[0].getVectorNumElements() ==

            Ops[1].getValueType().getVectorNumElements()) &&

           "Vector element count mismatch!");

    assert(Ops[1].getValueType().bitsLT(VTList.VTs[0]) &&

           "Invalid fpext node, dst <= src!");

    break;

  case ISD::STRICT_FP_ROUND:

    assert(VTList.NumVTs == 2 && Ops.size() == 3 && "Invalid STRICT_FP_ROUND!");

    assert(VTList.VTs[0].isVector() == Ops[1].getValueType().isVector() &&

           "STRICT_FP_ROUND result type should be vector iff the operand "

           "type is vector!");

    assert((!VTList.VTs[0].isVector() ||

            VTList.VTs[0].getVectorNumElements() ==

            Ops[1].getValueType().getVectorNumElements()) &&

           "Vector element count mismatch!");

    assert(VTList.VTs[0].isFloatingPoint() &&

           Ops[1].getValueType().isFloatingPoint() &&

           VTList.VTs[0].bitsLT(Ops[1].getValueType()) &&

           isa<ConstantSDNode>(Ops[2]) &&

           (cast<ConstantSDNode>(Ops[2])->getZExtValue() == 0 ||

            cast<ConstantSDNode>(Ops[2])->getZExtValue() == 1) &&

           "Invalid STRICT_FP_ROUND!");

    break;

#if 0

  // FIXME: figure out how to safely handle things like

  // int foo(int x) { return 1 << (x & 255); }

  // int bar() { return foo(256); }
@@ -7342,8 +7374,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, 
          return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));

      }

    break;

  }

#endif

  }



  // Memoize the node unless it returns a flag.

  SDNode *N;

llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll

0 → 100644
+1569 −0

File added.

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