Commit e81021a5 authored by Dan Gohman's avatar Dan Gohman
Browse files

[WebAssembly] Convert stackified IMPLICIT_DEF into constant 0. 

Since IMPLIFIT_DEF instructions are omitted in the output, when the output
of an IMPLICIT_DEF instruction is stackified, the resulting register lacks
an explicit push, leading to a push/pop mismatch. Fix this by converting
such IMPLICIT_DEFs into CONST_I32 0 instructions so that they have explicit
pushes.

llvm-svn: 286274
parent 53a03a28

llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp

+37 −0
Original line number Diff line number Diff line
@@ -87,6 +87,37 @@ static void ImposeStackOrdering(MachineInstr *MI) { 
                                             /*isImp=*/true));

}



// Convert an IMPLICIT_DEF instruction into an instruction which defines

// a constant zero value.

static void ConvertImplicitDefToConstZero(MachineInstr *MI,

                                          MachineRegisterInfo &MRI,

                                          const TargetInstrInfo *TII,

                                          MachineFunction &MF) {

  assert(MI->getOpcode() == TargetOpcode::IMPLICIT_DEF);



  const auto *RegClass =

      MRI.getRegClass(MI->getOperand(0).getReg());

  if (RegClass == &WebAssembly::I32RegClass) {

    MI->setDesc(TII->get(WebAssembly::CONST_I32));

    MI->addOperand(MachineOperand::CreateImm(0));

  } else if (RegClass == &WebAssembly::I64RegClass) {

    MI->setDesc(TII->get(WebAssembly::CONST_I64));

    MI->addOperand(MachineOperand::CreateImm(0));

  } else if (RegClass == &WebAssembly::F32RegClass) {

    MI->setDesc(TII->get(WebAssembly::CONST_F32));

    ConstantFP *Val = cast<ConstantFP>(Constant::getNullValue(

        Type::getFloatTy(MF.getFunction()->getContext())));

    MI->addOperand(MachineOperand::CreateFPImm(Val));

  } else if (RegClass == &WebAssembly::F64RegClass) {

    MI->setDesc(TII->get(WebAssembly::CONST_F64));

    ConstantFP *Val = cast<ConstantFP>(Constant::getNullValue(

        Type::getDoubleTy(MF.getFunction()->getContext())));

    MI->addOperand(MachineOperand::CreateFPImm(Val));

  } else {

    llvm_unreachable("Unexpected reg class");

  }

}



// Determine whether a call to the callee referenced by

// MI->getOperand(CalleeOpNo) reads memory, writes memory, and/or has side

// effects.
@@ -791,6 +822,12 @@ bool WebAssemblyRegStackify::runOnMachineFunction(MachineFunction &MF) { 
          continue;

        }



        // If the instruction we just stackified is an IMPLICIT_DEF, convert it

        // to a constant 0 so that the def is explicit, and the push/pop

        // correspondence is maintained.

        if (Insert->getOpcode() == TargetOpcode::IMPLICIT_DEF)

          ConvertImplicitDefToConstZero(Insert, MRI, TII, MF);



        // We stackified an operand. Add the defining instruction's operands to

        // the worklist stack now to continue to build an ever deeper tree.

        Commuting.Reset();

llvm/test/CodeGen/WebAssembly/implicit-def.ll

0 → 100644
+50 −0
Original line number Diff line number Diff line 
; RUN: llc -o - %s | FileCheck %s

target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"

target triple = "wasm32-unknown-unknown"



; Test that stackified IMPLICIT_DEF instructions are converted into

; CONST_I32 to provide an explicit push.



; CHECK:      br_if 2,

; CHECK:      i32.const $push[[L0:[0-9]+]]=, 0{{$}}

; CHECK-NEXT: return $pop[[L0]]{{$}}

define i1 @f() {

  %a = xor i1 0, 0

  switch i1 %a, label %C [

    i1 0, label %A

    i1 1, label %B

  ]



A:

  %b = xor i1 0, 0

  br label %X



B:

  %c = xor i1 0, 0

  br i1 %c, label %D, label %X



C:

  %d = icmp slt i32 0, 0

  br i1 %d, label %G, label %F



D:

  %e = xor i1 0, 0

  br i1 %e, label %E, label %X



E:

  %f = xor i1 0, 0

  br label %X



F:

  %g = xor i1 0, 0

  br label %G



G:

  %h = phi i1 [ undef, %C ], [ false, %F ]

  br label %X



X:

  %i = phi i1 [ true, %A ], [ true, %B ], [ true, %D ], [ true, %E ], [ %h, %G ]

  ret i1 %i

}