Commit e578d0fd authored by Simon Atanasyan's avatar Simon Atanasyan
Browse files

[mips] Fix `__mips_isa_rev` macros value for Octeon CPU

parent 92164cf2

clang/lib/Basic/Targets/Mips.cpp

+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ void MipsTargetInfo::fillValidCPUList( 
unsigned MipsTargetInfo::getISARev() const {

  return llvm::StringSwitch<unsigned>(getCPU())

             .Cases("mips32", "mips64", 1)

             .Cases("mips32r2", "mips64r2", 2)

             .Cases("mips32r2", "mips64r2", "octeon", 2)

             .Cases("mips32r3", "mips64r3", 3)

             .Cases("mips32r5", "mips64r5", 5)

             .Cases("mips32r6", "mips64r6", 6)

clang/test/Preprocessor/init.c

+9 −0
Original line number Diff line number Diff line
@@ -4832,6 +4832,15 @@ 
// MIPS-ARCH-64R6:#define _MIPS_ISA _MIPS_ISA_MIPS64

// MIPS-ARCH-64R6:#define __mips_isa_rev 6

//

// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \

// RUN:            -target-cpu octeon < /dev/null \

// RUN:   | FileCheck -match-full-lines -check-prefix MIPS-ARCH-OCTEON %s

//

// MIPS-ARCH-OCTEON:#define _MIPS_ARCH "octeon"

// MIPS-ARCH-OCTEON:#define _MIPS_ARCH_OCTEON 1

// MIPS-ARCH-OCTEON:#define _MIPS_ISA _MIPS_ISA_MIPS64

// MIPS-ARCH-OCTEON:#define __mips_isa_rev 2

//

// Check MIPS float ABI macros

//

// RUN: %clang_cc1 -E -dM -ffreestanding \