Loading llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +1 −1 Original line number Diff line number Diff line Loading @@ -177,7 +177,7 @@ namespace { std::vector<SDValue> &OutOps) override { // We need to make sure that this one operand does not end up in r0 // (because we might end up lowering this as 0(%op)). const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo(); const TargetRegisterInfo *TRI = TM.getRegisterInfo(); const TargetRegisterClass *TRC = TRI->getPointerRegClass(*MF, /*Kind=*/1); SDValue RC = CurDAG->getTargetConstant(TRC->getID(), MVT::i32); SDValue NewOp = Loading Loading
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +1 −1 Original line number Diff line number Diff line Loading @@ -177,7 +177,7 @@ namespace { std::vector<SDValue> &OutOps) override { // We need to make sure that this one operand does not end up in r0 // (because we might end up lowering this as 0(%op)). const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo(); const TargetRegisterInfo *TRI = TM.getRegisterInfo(); const TargetRegisterClass *TRC = TRI->getPointerRegClass(*MF, /*Kind=*/1); SDValue RC = CurDAG->getTargetConstant(TRC->getID(), MVT::i32); SDValue NewOp = Loading