Loading llvm/lib/Target/AMDGPU/VOP2Instructions.td +4 −4 Original line number Diff line number Diff line Loading @@ -865,7 +865,7 @@ defm V_CNDMASK_B16_t16 : VOP2eInst <"v_cndmask_b16_t16", VOP2e_I16_I16_I16_I1_tr let SubtargetPredicate = isGFX11Plus, True16Predicate = UseFakeTrue16Insts in defm V_CNDMASK_B16_fake16 : VOP2eInst <"v_cndmask_b16_fake16", VOP2e_I16_I16_I16_I1_fake16>; defm V_CNDMASK_B32 : VOP2eInst_VOPD <"v_cndmask_b32", VOP2e_I32_I32_I32_I1, 0x9, "v_cndmask_b32">; let SubtargetPredicate = HasMadMacF32Insts, isReMaterializable = 1 in let SubtargetPredicate = HasMadMacF32Insts, isReMaterializable = 1, FixedSize = 1 in def V_MADMK_F32 : VOP2_Pseudo <"v_madmk_f32", VOP_MADMK_F32, []>; let isCommutable = 1 in { Loading Loading @@ -904,7 +904,7 @@ defm V_MAC_LEGACY_F32 : VOP2Inst <"v_mac_legacy_f32", VOP_MAC_LEGACY_F32>; } // End Constraints = "$vdst = $src2", // isConvertibleToThreeAddress = 1 let isReMaterializable = 1 in let isReMaterializable = 1, FixedSize = 1 in def V_MADAK_F32 : VOP2_Pseudo <"v_madak_f32", VOP_MADAK_F32, []>; } // End OtherPredicates = [HasMadMacF32Insts] } // End mayRaiseFPException = 0 Loading Loading @@ -1202,11 +1202,11 @@ let True16Predicate = UseFakeTrue16Insts in { let SubtargetPredicate = Has16BitInsts in { let isReMaterializable = 1 in { let FPDPRounding = 1 in { let FPDPRounding = 1, FixedSize = 1 in { def V_MADMK_F16 : VOP2_Pseudo <"v_madmk_f16", VOP_MADMK_F16, [], "">; } // End FPDPRounding = 1 let isCommutable = 1 in { let mayRaiseFPException = 0 in { let mayRaiseFPException = 0, FixedSize = 1 in { def V_MADAK_F16 : VOP2_Pseudo <"v_madak_f16", VOP_MADAK_F16, [], "">; } let SubtargetPredicate = isGFX8GFX9 in { Loading llvm/test/CodeGen/AMDGPU/madmk-madak-encoding-size.ll 0 → 100644 +34 −0 Original line number Diff line number Diff line ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -filetype=obj < %s | llvm-objdump --triple=amdgcn-amd-amdhsa --mcpu=gfx803 --disassemble - | FileCheck %s ; Make sure computed instruction sizes for madak/madmk are correct and ; pass the instruction size verifier. ; CHECK: v_madak_f32 v0, v0, v1, 0x41200000 // 000000000004: 30000300 41200000 define float @v_madak_f32(float %a, float %b) #0 { %mul = fmul float %a, %b %madmk = fadd float %mul, 10.0 ret float %madmk } ; CHECK: v_madmk_f32 v0, v0, 0x41200000, v1 // 000000000044: 2E000300 41200000 define float @v_madmk_f32(float %a, float %b) #0 { %mul = fmul float %a, 10.0 %madmk = fadd float %mul, %b ret float %madmk } ; CHECK: v_madak_f16 v0, v0, v1, 0x4900 // 000000000084: 4A000300 00004900 define half @v_madak_f16(half %a, half %b) #0 { %mul = fmul half %a, %b %madmk = fadd half %mul, 10.0 ret half %madmk } ; CHECK: v_madmk_f16 v0, v0, 0x4900, v1 // 0000000000C4: 48000300 00004900 define half @v_madmk_f16(half %a, half %b) #0 { %mul = fmul half %a, 10.0 %madmk = fadd half %mul, %b ret half %madmk } attributes #0 = { nounwind denormal_fpenv(preservesign) } Loading
llvm/lib/Target/AMDGPU/VOP2Instructions.td +4 −4 Original line number Diff line number Diff line Loading @@ -865,7 +865,7 @@ defm V_CNDMASK_B16_t16 : VOP2eInst <"v_cndmask_b16_t16", VOP2e_I16_I16_I16_I1_tr let SubtargetPredicate = isGFX11Plus, True16Predicate = UseFakeTrue16Insts in defm V_CNDMASK_B16_fake16 : VOP2eInst <"v_cndmask_b16_fake16", VOP2e_I16_I16_I16_I1_fake16>; defm V_CNDMASK_B32 : VOP2eInst_VOPD <"v_cndmask_b32", VOP2e_I32_I32_I32_I1, 0x9, "v_cndmask_b32">; let SubtargetPredicate = HasMadMacF32Insts, isReMaterializable = 1 in let SubtargetPredicate = HasMadMacF32Insts, isReMaterializable = 1, FixedSize = 1 in def V_MADMK_F32 : VOP2_Pseudo <"v_madmk_f32", VOP_MADMK_F32, []>; let isCommutable = 1 in { Loading Loading @@ -904,7 +904,7 @@ defm V_MAC_LEGACY_F32 : VOP2Inst <"v_mac_legacy_f32", VOP_MAC_LEGACY_F32>; } // End Constraints = "$vdst = $src2", // isConvertibleToThreeAddress = 1 let isReMaterializable = 1 in let isReMaterializable = 1, FixedSize = 1 in def V_MADAK_F32 : VOP2_Pseudo <"v_madak_f32", VOP_MADAK_F32, []>; } // End OtherPredicates = [HasMadMacF32Insts] } // End mayRaiseFPException = 0 Loading Loading @@ -1202,11 +1202,11 @@ let True16Predicate = UseFakeTrue16Insts in { let SubtargetPredicate = Has16BitInsts in { let isReMaterializable = 1 in { let FPDPRounding = 1 in { let FPDPRounding = 1, FixedSize = 1 in { def V_MADMK_F16 : VOP2_Pseudo <"v_madmk_f16", VOP_MADMK_F16, [], "">; } // End FPDPRounding = 1 let isCommutable = 1 in { let mayRaiseFPException = 0 in { let mayRaiseFPException = 0, FixedSize = 1 in { def V_MADAK_F16 : VOP2_Pseudo <"v_madak_f16", VOP_MADAK_F16, [], "">; } let SubtargetPredicate = isGFX8GFX9 in { Loading
llvm/test/CodeGen/AMDGPU/madmk-madak-encoding-size.ll 0 → 100644 +34 −0 Original line number Diff line number Diff line ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -filetype=obj < %s | llvm-objdump --triple=amdgcn-amd-amdhsa --mcpu=gfx803 --disassemble - | FileCheck %s ; Make sure computed instruction sizes for madak/madmk are correct and ; pass the instruction size verifier. ; CHECK: v_madak_f32 v0, v0, v1, 0x41200000 // 000000000004: 30000300 41200000 define float @v_madak_f32(float %a, float %b) #0 { %mul = fmul float %a, %b %madmk = fadd float %mul, 10.0 ret float %madmk } ; CHECK: v_madmk_f32 v0, v0, 0x41200000, v1 // 000000000044: 2E000300 41200000 define float @v_madmk_f32(float %a, float %b) #0 { %mul = fmul float %a, 10.0 %madmk = fadd float %mul, %b ret float %madmk } ; CHECK: v_madak_f16 v0, v0, v1, 0x4900 // 000000000084: 4A000300 00004900 define half @v_madak_f16(half %a, half %b) #0 { %mul = fmul half %a, %b %madmk = fadd half %mul, 10.0 ret half %madmk } ; CHECK: v_madmk_f16 v0, v0, 0x4900, v1 // 0000000000C4: 48000300 00004900 define half @v_madmk_f16(half %a, half %b) #0 { %mul = fmul half %a, 10.0 %madmk = fadd half %mul, %b ret half %madmk } attributes #0 = { nounwind denormal_fpenv(preservesign) }