Loading llvm/lib/Target/X86/X86ISelLowering.cpp +7 −10 Original line number Diff line number Diff line Loading @@ -12195,13 +12195,10 @@ X86TargetLowering::isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask, // X86 Scheduler Hooks //===----------------------------------------------------------------------===// // private utility function /// Utility function to emit xbegin specifying the start of an RTM region. MachineBasicBlock * X86TargetLowering::EmitXBegin(MachineInstr *MI, MachineBasicBlock *MBB) const { static MachineBasicBlock *EmitXBegin(MachineInstr *MI, MachineBasicBlock *MBB, const TargetInstrInfo *TII) { DebugLoc DL = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); const BasicBlock *BB = MBB->getBasicBlock(); MachineFunction::iterator I = MBB; Loading Loading @@ -12912,10 +12909,10 @@ static MachineBasicBlock *EmitPCMPSTRI(MachineInstr *MI, MachineBasicBlock *BB, return BB; } MachineBasicBlock * X86TargetLowering::EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const { static MachineBasicBlock * EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB, const TargetInstrInfo *TII, const X86Subtarget* Subtarget) { DebugLoc dl = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); // Address into RAX/EAX, other two args into ECX, EDX. unsigned MemOpc = Subtarget->is64Bit() ? X86::LEA64r : X86::LEA32r; Loading Loading @@ -13949,11 +13946,11 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, // Thread synchronization. case X86::MONITOR: return EmitMonitor(MI, BB); return EmitMonitor(MI, BB, getTargetMachine().getInstrInfo(), Subtarget); // xbegin case X86::XBEGIN: return EmitXBegin(MI, BB); return EmitXBegin(MI, BB, getTargetMachine().getInstrInfo()); // Atomic Lowering. case X86::ATOMAND8: llvm/lib/Target/X86/X86ISelLowering.h +0 −10 Original line number Diff line number Diff line Loading @@ -871,12 +871,6 @@ namespace llvm { const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const; /// Utility functions to emit monitor and mwait instructions. These /// need to make sure that the arguments to the intrinsic are in the /// correct registers. MachineBasicBlock *EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const; /// Utility function to emit atomic-load-arith operations (and, or, xor, /// nand, max, min, umax, umin). It takes the corresponding instruction to /// expand, the associated machine basic block, and the associated X86 Loading @@ -889,10 +883,6 @@ namespace llvm { MachineBasicBlock *EmitAtomicLoadArith6432(MachineInstr *MI, MachineBasicBlock *MBB) const; /// Utility function to emit xbegin specifying the start of an RTM region. MachineBasicBlock *EmitXBegin(MachineInstr *MI, MachineBasicBlock *MBB) const; // Utility function to emit the low-level va_arg code for X86-64. MachineBasicBlock *EmitVAARG64WithCustomInserter( MachineInstr *MI, Loading Loading
llvm/lib/Target/X86/X86ISelLowering.cpp +7 −10 Original line number Diff line number Diff line Loading @@ -12195,13 +12195,10 @@ X86TargetLowering::isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask, // X86 Scheduler Hooks //===----------------------------------------------------------------------===// // private utility function /// Utility function to emit xbegin specifying the start of an RTM region. MachineBasicBlock * X86TargetLowering::EmitXBegin(MachineInstr *MI, MachineBasicBlock *MBB) const { static MachineBasicBlock *EmitXBegin(MachineInstr *MI, MachineBasicBlock *MBB, const TargetInstrInfo *TII) { DebugLoc DL = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); const BasicBlock *BB = MBB->getBasicBlock(); MachineFunction::iterator I = MBB; Loading Loading @@ -12912,10 +12909,10 @@ static MachineBasicBlock *EmitPCMPSTRI(MachineInstr *MI, MachineBasicBlock *BB, return BB; } MachineBasicBlock * X86TargetLowering::EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const { static MachineBasicBlock * EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB, const TargetInstrInfo *TII, const X86Subtarget* Subtarget) { DebugLoc dl = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); // Address into RAX/EAX, other two args into ECX, EDX. unsigned MemOpc = Subtarget->is64Bit() ? X86::LEA64r : X86::LEA32r; Loading Loading @@ -13949,11 +13946,11 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, // Thread synchronization. case X86::MONITOR: return EmitMonitor(MI, BB); return EmitMonitor(MI, BB, getTargetMachine().getInstrInfo(), Subtarget); // xbegin case X86::XBEGIN: return EmitXBegin(MI, BB); return EmitXBegin(MI, BB, getTargetMachine().getInstrInfo()); // Atomic Lowering. case X86::ATOMAND8:
llvm/lib/Target/X86/X86ISelLowering.h +0 −10 Original line number Diff line number Diff line Loading @@ -871,12 +871,6 @@ namespace llvm { const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const; /// Utility functions to emit monitor and mwait instructions. These /// need to make sure that the arguments to the intrinsic are in the /// correct registers. MachineBasicBlock *EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const; /// Utility function to emit atomic-load-arith operations (and, or, xor, /// nand, max, min, umax, umin). It takes the corresponding instruction to /// expand, the associated machine basic block, and the associated X86 Loading @@ -889,10 +883,6 @@ namespace llvm { MachineBasicBlock *EmitAtomicLoadArith6432(MachineInstr *MI, MachineBasicBlock *MBB) const; /// Utility function to emit xbegin specifying the start of an RTM region. MachineBasicBlock *EmitXBegin(MachineInstr *MI, MachineBasicBlock *MBB) const; // Utility function to emit the low-level va_arg code for X86-64. MachineBasicBlock *EmitVAARG64WithCustomInserter( MachineInstr *MI, Loading