Commit db9a51ac authored by Hans Wennborg's avatar Hans Wennborg
Browse files

Merging r243638 and r243640: 

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r243638 | vkalintiris | 2015-07-30 05:39:33 -0700 (Thu, 30 Jul 2015) | 12 lines

[mips][FastISel] Remove hidden mips-fast-isel option.

Summary:
This hidden option would disable code generation through FastISel by
default. It was removed from the available options and from the
Fast-ISel tests that required it in order to run the tests.

Reviewers: dsanders

Subscribers: qcolombet, llvm-commits

Differential Revision: http://reviews.llvm.org/D11610
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r243640 | vkalintiris | 2015-07-30 06:13:09 -0700 (Thu, 30 Jul 2015) | 5 lines

[mips] Fix out-of-date debug information in test file.

Update the debug info in the check-lines because the change in r243638
introduced a constant initialization before the prologue's end as part
of a register spill.
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llvm-svn: 243650
parent 68e239ab

llvm/lib/Target/Mips/MipsISelLowering.cpp

+2 −6
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include "llvm/CodeGen/MachineInstrBuilder.h"

#include "llvm/CodeGen/MachineJumpTableInfo.h"

#include "llvm/CodeGen/MachineRegisterInfo.h"

#include "llvm/CodeGen/FunctionLoweringInfo.h"

#include "llvm/CodeGen/SelectionDAGISel.h"

#include "llvm/CodeGen/ValueTypes.h"

#include "llvm/IR/CallingConv.h"
@@ -53,11 +54,6 @@ NoZeroDivCheck("mno-check-zero-division", cl::Hidden, 
               cl::desc("MIPS: Don't trap on integer division by zero."),

               cl::init(false));



cl::opt<bool>

EnableMipsFastISel("mips-fast-isel", cl::Hidden,

  cl::desc("Allow mips-fast-isel to be used"),

  cl::init(false));



static const MCPhysReg Mips64DPRegs[8] = {

  Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64,

  Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
@@ -461,7 +457,7 @@ const MipsTargetLowering *MipsTargetLowering::create(const MipsTargetMachine &TM 
FastISel *

MipsTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,

                                  const TargetLibraryInfo *libInfo) const {

  if (!EnableMipsFastISel)

  if (!funcInfo.MF->getTarget().Options.EnableFastISel)

    return TargetLowering::createFastISel(funcInfo, libInfo);

  return Mips::createFastISel(funcInfo, libInfo);

}

llvm/test/CodeGen/Mips/Fast-ISel/br1.ll

+2 −2
Original line number Diff line number Diff line 
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \

; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \

; RUN:     < %s | FileCheck %s

; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \

; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \

; RUN:     < %s | FileCheck %s



@b = global i32 1, align 4

llvm/test/CodeGen/Mips/Fast-ISel/bswap1.ll

+2 −2
Original line number Diff line number Diff line 
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \

; RUN:      -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \

; RUN:      -fast-isel-abort=1 | FileCheck %s \

; RUN:      -check-prefix=ALL -check-prefix=32R1

; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \

; RUN:      -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \

; RUN:      -fast-isel-abort=1 | FileCheck %s \

; RUN:      -check-prefix=ALL -check-prefix=32R2



@a = global i16 -21829, align 2

llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll

+2 −2
Original line number Diff line number Diff line 
; RUN: llc -march=mipsel -mcpu=mips32 -O0 \

; RUN:     -mips-fast-isel -relocation-model=pic -fast-isel-abort=1 < %s | \

; RUN:     -relocation-model=pic -fast-isel-abort=1 < %s | \

; RUN:     FileCheck %s -check-prefix=ALL -check-prefix=32R1

; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 \

; RUN:     -mips-fast-isel -relocation-model=pic -fast-isel-abort=1 < %s | \

; RUN:     -relocation-model=pic -fast-isel-abort=1 < %s | \

; RUN:     FileCheck %s -check-prefix=ALL -check-prefix=32R2



declare void @xb(i8)

llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll

+2 −2
Original line number Diff line number Diff line 
; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic \

; RUN:     -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s

; RUN:     -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s

; RUN: llc -march=mipsel -mcpu=mips32r2 -relocation-model=pic \

; RUN:     -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s

; RUN:     -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s



@ARR = external global [10 x i32], align 4