Commit d9ccd0db authored by Tom Stellard's avatar Tom Stellard
Browse files

Merging r359883: 

------------------------------------------------------------------------
r359883 | arsenm | 2019-05-03 06:42:56 -0700 (Fri, 03 May 2019) | 6 lines

AMDGPU: Fix incorrect commute with sub when folding immediates

When a fold of an immediate into a sub/subrev required shrinking the
instruction, the wrong VOP2 opcode was used. This was using the VOP2
equivalent of the original instruction, not the commuted instruction
with the inverted opcode.
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llvm-svn: 360752
parent 74cfa7ac

llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

+4 −1
Original line number Diff line number Diff line
@@ -357,7 +357,10 @@ static bool tryAddToFoldList(SmallVectorImpl<FoldCandidate> &FoldList, 


        assert(MI->getOperand(1).isDef());



        int Op32 =  AMDGPU::getVOPe32(Opc);

        // Make sure to get the 32-bit version of the commuted opcode.

        unsigned MaybeCommutedOpc = MI->getOpcode();

        int Op32 = AMDGPU::getVOPe32(MaybeCommutedOpc);



        FoldList.push_back(FoldCandidate(MI, CommuteOpNo, OpToFold, true,

                                         Op32));

        return true;

llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir

+8 −8
Original line number Diff line number Diff line
@@ -250,8 +250,8 @@ body: | 
    ; GCN-LABEL: name: shrink_scalar_imm_vgpr_v_sub_i32_e64_no_carry_out_use

    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345

    ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF

    ; GCN: [[V_SUBREV_I32_e32_:%[0-9]+]]:vgpr_32 = V_SUBREV_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_SUBREV_I32_e32_]]

    ; GCN: [[V_SUB_I32_e32_:%[0-9]+]]:vgpr_32 = V_SUB_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_SUB_I32_e32_]]

    %0:sreg_32_xm0 = S_MOV_B32 12345

    %1:vgpr_32 = IMPLICIT_DEF

    %2:vgpr_32, %3:sreg_64 = V_SUB_I32_e64 %0, %1, implicit $exec
@@ -269,8 +269,8 @@ body: | 
    ; GCN-LABEL: name: shrink_vgpr_scalar_imm_v_sub_i32_e64_no_carry_out_use

    ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF

    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345

    ; GCN: [[V_SUB_I32_e32_:%[0-9]+]]:vgpr_32 = V_SUB_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_SUB_I32_e32_]]

    ; GCN: [[V_SUBREV_I32_e32_:%[0-9]+]]:vgpr_32 = V_SUBREV_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_SUBREV_I32_e32_]]

    %0:vgpr_32 = IMPLICIT_DEF

    %1:sreg_32_xm0 = S_MOV_B32 12345

    %2:vgpr_32, %3:sreg_64 = V_SUB_I32_e64 %0, %1, implicit $exec
@@ -288,8 +288,8 @@ body: | 
    ; GCN-LABEL: name: shrink_scalar_imm_vgpr_v_subrev_i32_e64_no_carry_out_use

    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345

    ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF

    ; GCN: [[V_SUB_I32_e32_:%[0-9]+]]:vgpr_32 = V_SUB_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_SUB_I32_e32_]]

    ; GCN: [[V_SUBREV_I32_e32_:%[0-9]+]]:vgpr_32 = V_SUBREV_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_SUBREV_I32_e32_]]

    %0:sreg_32_xm0 = S_MOV_B32 12345

    %1:vgpr_32 = IMPLICIT_DEF

    %2:vgpr_32, %3:sreg_64 = V_SUBREV_I32_e64 %0, %1, implicit $exec
@@ -307,8 +307,8 @@ body: | 
    ; GCN-LABEL: name: shrink_vgpr_scalar_imm_v_subrev_i32_e64_no_carry_out_use

    ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF

    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345

    ; GCN: [[V_SUBREV_I32_e32_:%[0-9]+]]:vgpr_32 = V_SUBREV_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_SUBREV_I32_e32_]]

    ; GCN: [[V_SUB_I32_e32_:%[0-9]+]]:vgpr_32 = V_SUB_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_SUB_I32_e32_]]

    %0:vgpr_32 = IMPLICIT_DEF

    %1:sreg_32_xm0 = S_MOV_B32 12345

    %2:vgpr_32, %3:sreg_64 = V_SUBREV_I32_e64 %0, %1, implicit $exec