Loading llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +6 −9 Original line number Diff line number Diff line Loading @@ -1057,12 +1057,10 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) { // anything, and before other cleanup optimizations. FPM.addPass(AMDGPULowerKernelAttributesPass()); if (Level != OptimizationLevel::O0) { // Promote alloca to vector before SROA and loop unroll. If we // manage to eliminate allocas before unroll we may choose to unroll // less. FPM.addPass(AMDGPUPromoteAllocaToVectorPass(*this)); } PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM))); }); Loading Loading @@ -1584,11 +1582,10 @@ bool AMDGPUPassConfig::addGCPasses() { bool GCNPassConfig::addPreISel() { AMDGPUPassConfig::addPreISel(); if (TM->getOptLevel() > CodeGenOptLevel::None) if (TM->getOptLevel() > CodeGenOptLevel::None) { addPass(createSinkingPass()); if (TM->getOptLevel() > CodeGenOptLevel::None) addPass(createAMDGPULateCodeGenPrepareLegacyPass()); } // Merge divergent exit nodes. StructurizeCFG won't recognize the multi-exit // regions formed by them. Loading Loading
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +6 −9 Original line number Diff line number Diff line Loading @@ -1057,12 +1057,10 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) { // anything, and before other cleanup optimizations. FPM.addPass(AMDGPULowerKernelAttributesPass()); if (Level != OptimizationLevel::O0) { // Promote alloca to vector before SROA and loop unroll. If we // manage to eliminate allocas before unroll we may choose to unroll // less. FPM.addPass(AMDGPUPromoteAllocaToVectorPass(*this)); } PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM))); }); Loading Loading @@ -1584,11 +1582,10 @@ bool AMDGPUPassConfig::addGCPasses() { bool GCNPassConfig::addPreISel() { AMDGPUPassConfig::addPreISel(); if (TM->getOptLevel() > CodeGenOptLevel::None) if (TM->getOptLevel() > CodeGenOptLevel::None) { addPass(createSinkingPass()); if (TM->getOptLevel() > CodeGenOptLevel::None) addPass(createAMDGPULateCodeGenPrepareLegacyPass()); } // Merge divergent exit nodes. StructurizeCFG won't recognize the multi-exit // regions formed by them. Loading