Unverified Commit cc5c2efe authored by Jay Foad's avatar Jay Foad Committed by GitHub
Browse files

[AMDGPU] Fix and use isSISrcInlinableOperand. NFC. (#72101)

parent ced97ffd

llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

+2 −5
Original line number Diff line number Diff line
@@ -565,13 +565,10 @@ bool SIFoldOperands::tryToFoldACImm( 
  if (UseOpIdx >= Desc.getNumOperands())

    return false;



  uint8_t OpTy = Desc.operands()[UseOpIdx].OperandType;

  if ((OpTy < AMDGPU::OPERAND_REG_INLINE_AC_FIRST ||

       OpTy > AMDGPU::OPERAND_REG_INLINE_AC_LAST) &&

      (OpTy < AMDGPU::OPERAND_REG_INLINE_C_FIRST ||

       OpTy > AMDGPU::OPERAND_REG_INLINE_C_LAST))

  if (!AMDGPU::isSISrcInlinableOperand(Desc, UseOpIdx))

    return false;



  uint8_t OpTy = Desc.operands()[UseOpIdx].OperandType;

  if (OpToFold.isImm() && TII->isInlineConstant(OpToFold, OpTy) &&

      TII->isOperandLegal(*UseMI, UseOpIdx, &OpToFold)) {

    UseMI->getOperand(UseOpIdx).ChangeToImmediate(OpToFold.getImm());

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

+4 −2
Original line number Diff line number Diff line
@@ -2239,8 +2239,10 @@ bool isSISrcFPOperand(const MCInstrDesc &Desc, unsigned OpNo) { 
bool isSISrcInlinableOperand(const MCInstrDesc &Desc, unsigned OpNo) {

  assert(OpNo < Desc.NumOperands);

  unsigned OpType = Desc.operands()[OpNo].OperandType;

  return OpType >= AMDGPU::OPERAND_REG_INLINE_C_FIRST &&

         OpType <= AMDGPU::OPERAND_REG_INLINE_C_LAST;

  return (OpType >= AMDGPU::OPERAND_REG_INLINE_C_FIRST &&

          OpType <= AMDGPU::OPERAND_REG_INLINE_C_LAST) ||

         (OpType >= AMDGPU::OPERAND_REG_INLINE_AC_FIRST &&

          OpType <= AMDGPU::OPERAND_REG_INLINE_AC_LAST);

}



// Avoid using MCRegisterClass::getSize, since that function will go away