Commit c9ddb026 authored by Muhammad Omair Javaid's avatar Muhammad Omair Javaid
Browse files

Revert "As a follow-up to my initial mail to llvm-dev here's a first pass at... 

Revert "As a follow-up to my initial mail to llvm-dev here's a first pass at the O1 described there."

This reverts commit 8ff85ed9.

This commit introduced 9 new failures on lldb buildbot host at http://lab.llvm.org:8014/builders/lldb-aarch64-ubuntu

Following tests were failing:
    lldb-api :: functionalities/tail_call_frames/ambiguous_tail_call_seq1/TestAmbiguousTailCallSeq1.py
    lldb-api :: functionalities/tail_call_frames/ambiguous_tail_call_seq2/TestAmbiguousTailCallSeq2.py
    lldb-api :: functionalities/tail_call_frames/disambiguate_call_site/TestDisambiguateCallSite.py
    lldb-api :: functionalities/tail_call_frames/disambiguate_paths_to_common_sink/TestDisambiguatePathsToCommonSink.py
    lldb-api :: functionalities/tail_call_frames/disambiguate_tail_call_seq/TestDisambiguateTailCallSeq.py
    lldb-api :: functionalities/tail_call_frames/inlining_and_tail_calls/TestInliningAndTailCalls.py
    lldb-api :: functionalities/tail_call_frames/sbapi_support/TestTailCallFrameSBAPI.py
    lldb-api :: functionalities/tail_call_frames/thread_step_out_message/TestArtificialFrameStepOutMessage.py
    lldb-api :: functionalities/tail_call_frames/thread_step_out_or_return/TestSteppingOutWithArtificialFrames.py
    lldb-api :: functionalities/tail_call_frames/unambiguous_sequence/TestUnambiguousTailCalls.py

Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65410
parent 3dc7c5f7

clang/test/CodeGen/2008-07-30-implicit-initialization.c

+1 −1
Original line number Diff line number Diff line 
// RUN: %clang_cc1 -triple i386-unknown-unknown -O2 -emit-llvm -o - %s | FileCheck %s

// RUN: %clang_cc1 -triple i386-unknown-unknown -O1 -emit-llvm -o - %s | FileCheck %s

// CHECK-LABEL: define i32 @f0()

// CHECK:   ret i32 0

// CHECK-LABEL: define i32 @f1()

clang/test/CodeGen/arm-fp16-arguments.c

+3 −3
Original line number Diff line number Diff line 
// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT

// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi hard -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=HARD

// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fnative-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=NATIVE

// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fallow-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT

// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi hard -fallow-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=CHECK --check-prefix=HARD

// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fnative-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=NATIVE



__fp16 g;

clang/test/CodeGen/arm-vfp16-arguments2.cpp

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Original line number Diff line number Diff line 
// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \

// RUN:   -mfloat-abi soft -target-feature +neon -emit-llvm -o - -O2 %s \

// RUN:   -mfloat-abi soft -target-feature +neon -emit-llvm -o - -O1 %s \

// RUN:   | FileCheck %s --check-prefix=CHECK-SOFT

// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \

// RUN:   -mfloat-abi hard -target-feature +neon -emit-llvm -o - -O2 %s \

// RUN:   -mfloat-abi hard -target-feature +neon -emit-llvm -o - -O1 %s \

// RUN:   | FileCheck %s --check-prefix=CHECK-HARD

// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \

// RUN:   -mfloat-abi hard -target-feature +neon -target-feature +fullfp16 \

// RUN:   -emit-llvm -o - -O2 %s \

// RUN:   -emit-llvm -o - -O1 %s \

// RUN:   | FileCheck %s --check-prefix=CHECK-FULL



typedef float float32_t;

clang/test/CodeGen/atomic-ops-libcall.c

+17 −17
Original line number Diff line number Diff line
@@ -10,109 +10,109 @@ enum memory_order { 


int *test_c11_atomic_fetch_add_int_ptr(_Atomic(int *) *p) {

  // CHECK: test_c11_atomic_fetch_add_int_ptr

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 12, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 12, i32 5)

  return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst);

}



int *test_c11_atomic_fetch_sub_int_ptr(_Atomic(int *) *p) {

  // CHECK: test_c11_atomic_fetch_sub_int_ptr

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 20, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 20, i32 5)

  return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst);

}



int test_c11_atomic_fetch_add_int(_Atomic(int) *p) {

  // CHECK: test_c11_atomic_fetch_add_int

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 3, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 3, i32 5)

  return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst);

}



int test_c11_atomic_fetch_sub_int(_Atomic(int) *p) {

  // CHECK: test_c11_atomic_fetch_sub_int

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 5, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 5, i32 5)

  return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst);

}



int *fp2a(int **p) {

  // CHECK: @fp2a

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 4, i32 0)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 4, i32 0)

  // Note, the GNU builtins do not multiply by sizeof(T)!

  return __atomic_fetch_sub(p, 4, memory_order_relaxed);

}



int test_atomic_fetch_add(int *p) {

  // CHECK: test_atomic_fetch_add

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  return __atomic_fetch_add(p, 55, memory_order_seq_cst);

}



int test_atomic_fetch_sub(int *p) {

  // CHECK: test_atomic_fetch_sub

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  return __atomic_fetch_sub(p, 55, memory_order_seq_cst);

}



int test_atomic_fetch_and(int *p) {

  // CHECK: test_atomic_fetch_and

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  return __atomic_fetch_and(p, 55, memory_order_seq_cst);

}



int test_atomic_fetch_or(int *p) {

  // CHECK: test_atomic_fetch_or

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  return __atomic_fetch_or(p, 55, memory_order_seq_cst);

}



int test_atomic_fetch_xor(int *p) {

  // CHECK: test_atomic_fetch_xor

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  return __atomic_fetch_xor(p, 55, memory_order_seq_cst);

}



int test_atomic_fetch_nand(int *p) {

  // CHECK: test_atomic_fetch_nand

  // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  return __atomic_fetch_nand(p, 55, memory_order_seq_cst);

}



int test_atomic_add_fetch(int *p) {

  // CHECK: test_atomic_add_fetch

  // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = add i32 [[CALL]], 55

  return __atomic_add_fetch(p, 55, memory_order_seq_cst);

}



int test_atomic_sub_fetch(int *p) {

  // CHECK: test_atomic_sub_fetch

  // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = add i32 [[CALL]], -55

  return __atomic_sub_fetch(p, 55, memory_order_seq_cst);

}



int test_atomic_and_fetch(int *p) {

  // CHECK: test_atomic_and_fetch

  // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = and i32 [[CALL]], 55

  return __atomic_and_fetch(p, 55, memory_order_seq_cst);

}



int test_atomic_or_fetch(int *p) {

  // CHECK: test_atomic_or_fetch

  // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = or i32 [[CALL]], 55

  return __atomic_or_fetch(p, 55, memory_order_seq_cst);

}



int test_atomic_xor_fetch(int *p) {

  // CHECK: test_atomic_xor_fetch

  // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: {{%[^ ]*}} = xor i32 [[CALL]], 55

  return __atomic_xor_fetch(p, 55, memory_order_seq_cst);

}



int test_atomic_nand_fetch(int *p) {

  // CHECK: test_atomic_nand_fetch

  // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5)

  // FIXME: We should not be checking optimized IR. It changes independently of clang.

  // FIXME-CHECK: [[AND:%[^ ]*]] = and i32 [[CALL]], 55

  // FIXME-CHECK: {{%[^ ]*}} = xor i32 [[AND]], -1

clang/test/CodeGenCXX/atomicinit.cpp

+1 −1
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@@ -31,7 +31,7 @@ _Atomic(B) b; 
// CHECK-LABEL: define void @_Z11atomic_initR1Ai

void atomic_init(A& a, int i) {

  // CHECK-NOT: atomic

  // CHECK: call void @_ZN1BC1Ei

  // CHECK: tail call void @_ZN1BC1Ei

  __c11_atomic_init(&b, B(i));

  // CHECK-NEXT: ret void

}