Commit c8af2415 authored by Matt Arsenault's avatar Matt Arsenault
Browse files

Merging r359898: 

------------------------------------------------------------------------
r359898 | arsenm | 2019-05-03 08:21:53 -0700 (Fri, 03 May 2019) | 3 lines

AMDGPU: Support shrinking add with FI in SIFoldOperands

Avoids test regression in a future patch
------------------------------------------------------------------------

llvm-svn: 362648
parent b73bafaf

llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

+37 −35
Original line number Diff line number Diff line
@@ -201,8 +201,9 @@ static bool updateOperand(FoldCandidate &Fold, 
        Mod.setImm(Mod.getImm() & ~SISrcMods::OP_SEL_1);

      }

    }

  }



    if (Fold.needsShrink()) {

  if ((Fold.isImm() || Fold.isFI()) && Fold.needsShrink()) {

    MachineBasicBlock *MBB = MI->getParent();

    auto Liveness = MBB->computeRegisterLiveness(&TRI, AMDGPU::VCC, MI);

    if (Liveness != MachineBasicBlock::LQR_Dead)
@@ -242,12 +243,13 @@ static bool updateOperand(FoldCandidate &Fold, 
    return true;

  }



  assert(!Fold.needsShrink() && "not handled");



  if (Fold.isImm()) {

    Old.ChangeToImmediate(Fold.ImmToFold);

    return true;

  }



  assert(!Fold.needsShrink() && "not handled");



  if (Fold.isFI()) {

    Old.ChangeToFrameIndex(Fold.FrameIndexToFold);

    return true;
@@ -348,7 +350,7 @@ static bool tryAddToFoldList(SmallVectorImpl<FoldCandidate> &FoldList, 
      if ((Opc == AMDGPU::V_ADD_I32_e64 ||

           Opc == AMDGPU::V_SUB_I32_e64 ||

           Opc == AMDGPU::V_SUBREV_I32_e64) && // FIXME

          OpToFold->isImm()) {

          (OpToFold->isImm() || OpToFold->isFI())) {

        MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo();



        // Verify the other operand is a VGPR, otherwise we would violate the

llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir

0 → 100644
+230 −0
Original line number Diff line number Diff line 
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py

# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass si-fold-operands,dead-mi-elimination  %s -o - | FileCheck -check-prefix=GCN %s



---



# First operand is FI is in a VGPR, other operand is a VGPR

name: shrink_vgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }

body:             |

  bb.0:

    liveins: $vgpr0



    ; GCN-LABEL: name: shrink_vgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use

    ; GCN: liveins: $vgpr0

    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0

    ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[V_MOV_B32_e32_]], [[COPY]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]]

    %0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    %1:vgpr_32 = COPY $vgpr0

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...



---



# First operand is a VGPR, other operand FI is in a VGPR

name: shrink_vgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }

body:             |

  bb.0:

    liveins: $vgpr0



    ; GCN-LABEL: name: shrink_vgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use

    ; GCN: liveins: $vgpr0

    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0

    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[COPY]], [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]]

    %0:vgpr_32 = COPY $vgpr0

    %1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...



---



# First operand is FI is in an SGPR, other operand is a VGPR

name: shrink_vgpr_fi_sgpr_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }

body:             |

  bb.0:

    liveins: $sgpr0



    ; GCN-LABEL: name: shrink_vgpr_fi_sgpr_v_add_i32_e64_no_carry_out_use

    ; GCN: liveins: $sgpr0

    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0

    ; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e64_]]

    %0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    %1:sreg_32_xm0 = COPY $sgpr0

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...



---



# First operand is an SGPR, other operand FI is in a VGPR

name: shrink_sgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }

body:             |

  bb.0:

    liveins: $sgpr0



    ; GCN-LABEL: name: shrink_sgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use

    ; GCN: liveins: $sgpr0

    ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0

    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    ; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[V_MOV_B32_e32_]], [[COPY]], implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e64_]]

    %0:sreg_32_xm0 = COPY $sgpr0

    %1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...



---



# First operand is FI is in an SGPR, other operand is a VGPR

name: shrink_sgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }

body:             |

  bb.0:

    liveins: $vgpr0



    ; GCN-LABEL: name: shrink_sgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use

    ; GCN: liveins: $vgpr0

    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0

    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0

    ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[S_MOV_B32_]], [[COPY]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]]

    %0:sreg_32_xm0 = S_MOV_B32 %stack.0

    %1:vgpr_32 = COPY $vgpr0

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...



---



# First operand is a VGPR, other operand FI is in an SGPR

name: shrink_vgpr_sgpr_fi_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16}

body:             |

  bb.0:

    liveins: $vgpr0



    ; GCN-LABEL: name: shrink_vgpr_sgpr_fi_v_add_i32_e64_no_carry_out_use

    ; GCN: liveins: $vgpr0

    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0

    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0

    ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[S_MOV_B32_]], [[COPY]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]]

    %0:vgpr_32 = COPY $vgpr0

    %1:sreg_32_xm0 = S_MOV_B32 %stack.0

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...



---



# First operand is FI is in a VGPR, other operand is an inline imm in a VGPR

name: shrink_vgpr_imm_fi_vgpr_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }

body:             |

  bb.0:



    ; GCN-LABEL: name: shrink_vgpr_imm_fi_vgpr_v_add_i32_e64_no_carry_out_use

    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 16, [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]]

    %0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...



---



# First operand is an inline imm in a VGPR, other operand FI is in a VGPR

name: shrink_vgpr_imm_vgpr_fi_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }

body:             |

  bb.0:



    ; GCN-LABEL: name: shrink_vgpr_imm_vgpr_fi_v_add_i32_e64_no_carry_out_use

    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    ; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 16, [[V_MOV_B32_e32_]], implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e64_]]

    %0:vgpr_32 = V_MOV_B32_e32 16, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...



---



# First operand is FI is in a VGPR, other operand is an literal constant in a VGPR

name: shrink_vgpr_k_fi_vgpr_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }

body:             |

  bb.0:



    ; GCN-LABEL: name: shrink_vgpr_k_fi_vgpr_v_add_i32_e64_no_carry_out_use

    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 1234, [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]]

    %0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...



---



# First operand is a literal constant in a VGPR, other operand FI is in a VGPR

name: shrink_vgpr_k_vgpr_fi_v_add_i32_e64_no_carry_out_use

tracksRegLiveness: true

stack:

  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }

body:             |

  bb.0:



    ; GCN-LABEL: name: shrink_vgpr_k_vgpr_fi_v_add_i32_e64_no_carry_out_use

    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec

    ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 %stack.0, [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $exec

    ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]]

    %0:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec

    %2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, implicit $exec

    S_ENDPGM implicit %2



...