Loading llvm/lib/CodeGen/InstrSelection/InstrForest.cpp +130 −174 Original line number Diff line number Diff line Loading @@ -19,13 +19,13 @@ // //===----------------------------------------------------------------------===// #include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/Constant.h" #include "llvm/Function.h" #include "llvm/iTerminators.h" #include "llvm/iMemory.h" #include "llvm/Constant.h" #include "llvm/Type.h" #include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineInstr.h" #include "Support/STLExtras.h" #include "Config/alloca.h" Loading @@ -35,12 +35,10 @@ //------------------------------------------------------------------------ void InstrTreeNode::dump(int dumpChildren, int indent) const { InstrTreeNode::dump(int dumpChildren, int indent) const { dumpNode(indent); if (dumpChildren) { if (dumpChildren) { if (LeftChild) LeftChild->dump(dumpChildren, indent+1); if (RightChild) Loading @@ -50,50 +48,35 @@ InstrTreeNode::dump(int dumpChildren, int indent) const InstructionNode::InstructionNode(Instruction* I) : InstrTreeNode(NTInstructionNode, I), codeIsFoldedIntoParent(false) : InstrTreeNode(NTInstructionNode, I), codeIsFoldedIntoParent(false) { opLabel = I->getOpcode(); // Distinguish special cases of some instructions such as Ret and Br // if (opLabel == Instruction::Ret && cast<ReturnInst>(I)->getReturnValue()) { if (opLabel == Instruction::Ret && cast<ReturnInst>(I)->getReturnValue()) { opLabel = RetValueOp; // ret(value) operation } else if (opLabel ==Instruction::Br && !cast<BranchInst>(I)->isUnconditional()) { opLabel = BrCondOp; // br(cond) operation } else if (opLabel >= Instruction::SetEQ && opLabel <= Instruction::SetGT) { } else if (opLabel >= Instruction::SetEQ && opLabel <= Instruction::SetGT) { opLabel = SetCCOp; // common label for all SetCC ops } else if (opLabel == Instruction::Alloca && I->getNumOperands() > 0) { } else if (opLabel == Instruction::Alloca && I->getNumOperands() > 0) { opLabel = AllocaN; // Alloca(ptr, N) operation } else if (opLabel == Instruction::GetElementPtr && cast<GetElementPtrInst>(I)->hasIndices()) { } else if (opLabel == Instruction::GetElementPtr && cast<GetElementPtrInst>(I)->hasIndices()) { opLabel = opLabel + 100; // getElem with index vector } else if (opLabel == Instruction::Xor && BinaryOperator::isNot(I)) { } else if (opLabel == Instruction::Xor && BinaryOperator::isNot(I)) { opLabel = (I->getType() == Type::BoolTy)? NotOp // boolean Not operator : BNotOp; // bitwise Not operator } else if (opLabel == Instruction::And || opLabel == Instruction::Or || opLabel == Instruction::Xor) { } else if (opLabel == Instruction::And || opLabel == Instruction::Or || opLabel == Instruction::Xor) { // Distinguish bitwise operators from logical operators! if (I->getType() != Type::BoolTy) opLabel = opLabel + 100; // bitwise operator } else if (opLabel == Instruction::Cast) { } else if (opLabel == Instruction::Cast) { const Type *ITy = I->getType(); switch(ITy->getPrimitiveID()) { Loading @@ -119,18 +102,15 @@ InstructionNode::InstructionNode(Instruction* I) void InstructionNode::dumpNode(int indent) const { InstructionNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; std::cerr << getInstruction()->getOpcodeName() << " [label " << getOpLabel() << "]" << "\n"; } void VRegListNode::dumpNode(int indent) const { VRegListNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; Loading @@ -139,8 +119,7 @@ VRegListNode::dumpNode(int indent) const void VRegNode::dumpNode(int indent) const { VRegNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; Loading @@ -149,8 +128,7 @@ VRegNode::dumpNode(int indent) const } void ConstantNode::dumpNode(int indent) const { ConstantNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; Loading @@ -158,9 +136,7 @@ ConstantNode::dumpNode(int indent) const << (int) getValue()->getValueType() << ")" << "\n"; } void LabelNode::dumpNode(int indent) const { void LabelNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; Loading @@ -173,56 +149,46 @@ LabelNode::dumpNode(int indent) const // A forest of instruction trees, usually for a single method. //------------------------------------------------------------------------ InstrForest::InstrForest(Function *F) { InstrForest::InstrForest(Function *F) { for (Function::iterator BB = F->begin(), FE = F->end(); BB != FE; ++BB) { for(BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) buildTreeForInstruction(I); } } InstrForest::~InstrForest() { InstrForest::~InstrForest() { for_each(treeRoots.begin(), treeRoots.end(), deleter<InstructionNode>); } void InstrForest::dump() const { void InstrForest::dump() const { for (const_root_iterator I = roots_begin(); I != roots_end(); ++I) (*I)->dump(/*dumpChildren*/ 1, /*indent*/ 0); } inline void InstrForest::eraseRoot(InstructionNode* node) { inline void InstrForest::eraseRoot(InstructionNode* node) { for (RootSet::reverse_iterator RI=treeRoots.rbegin(), RE=treeRoots.rend(); RI != RE; ++RI) if (*RI == node) treeRoots.erase(RI.base()-1); } inline void InstrForest::noteTreeNodeForInstr(Instruction *instr, InstructionNode *treeNode) { inline void InstrForest::noteTreeNodeForInstr(Instruction *instr, InstructionNode *treeNode) { (*this)[instr] = treeNode; treeRoots.push_back(treeNode); // mark node as root of a new tree } inline void InstrForest::setLeftChild(InstrTreeNode *parent, InstrTreeNode *child) { inline void InstrForest::setLeftChild(InstrTreeNode *parent, InstrTreeNode *child) { parent->LeftChild = child; child->Parent = parent; if (InstructionNode* instrNode = dyn_cast<InstructionNode>(child)) eraseRoot(instrNode); // no longer a tree root } inline void InstrForest::setRightChild(InstrTreeNode *parent, InstrTreeNode *child) { inline void InstrForest::setRightChild(InstrTreeNode *parent, InstrTreeNode *child) { parent->RightChild = child; child->Parent = parent; if (InstructionNode* instrNode = dyn_cast<InstructionNode>(child)) Loading @@ -230,12 +196,9 @@ InstrForest::setRightChild(InstrTreeNode *parent, InstrTreeNode *child) } InstructionNode* InstrForest::buildTreeForInstruction(Instruction *instr) { InstructionNode* InstrForest::buildTreeForInstruction(Instruction *instr) { InstructionNode *treeNode = getTreeNodeForInstr(instr); if (treeNode) { if (treeNode) { // treeNode has already been constructed for this instruction assert(treeNode->getInstruction() == instr); return treeNode; Loading @@ -246,8 +209,8 @@ InstrForest::buildTreeForInstruction(Instruction *instr) treeNode = new InstructionNode(instr); noteTreeNodeForInstr(instr, treeNode); if (instr->getOpcode() == Instruction::Call) { // Operands of call instruction if (instr->getOpcode() == Instruction::Call) { // Operands of call instruction return treeNode; } Loading Loading @@ -311,14 +274,10 @@ InstrForest::buildTreeForInstruction(Instruction *instr) { // Recursively create a treeNode for it. opTreeNode = buildTreeForInstruction((Instruction*)operand); } else if (Constant *CPV = dyn_cast<Constant>(operand)) { } else if (Constant *CPV = dyn_cast<Constant>(operand)) { // Create a leaf node for a constant opTreeNode = new ConstantNode(CPV); } else { } else { // Create a leaf node for the virtual register opTreeNode = new VRegNode(operand); } Loading @@ -338,8 +297,7 @@ InstrForest::buildTreeForInstruction(Instruction *instr) InstrTreeNode *parent = treeNode; if (numChildren > 2) { if (numChildren > 2) { unsigned instrOpcode = treeNode->getInstruction()->getOpcode(); assert(instrOpcode == Instruction::PHI || instrOpcode == Instruction::Call || Loading @@ -355,8 +313,7 @@ InstrForest::buildTreeForInstruction(Instruction *instr) int n; // Create a list node for children 2 .. N-1, if any for (n = numChildren-1; n >= 2; n--) { for (n = numChildren-1; n >= 2; n--) { // We have more than two children InstrTreeNode *listNode = new VRegListNode(); setRightChild(parent, listNode); Loading @@ -365,8 +322,7 @@ InstrForest::buildTreeForInstruction(Instruction *instr) } // Now insert the last remaining child (if any). if (numChildren >= 2) { if (numChildren >= 2) { assert(n == 1); setRightChild(parent, childArray[numChildren - 1]); } Loading llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp +79 −87 Original line number Diff line number Diff line Loading @@ -14,19 +14,19 @@ // //===----------------------------------------------------------------------===// #include "llvm/Function.h" #include "llvm/iPHINode.h" #include "llvm/Pass.h" #include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/InstrSelection.h" #include "llvm/CodeGen/InstrSelectionSupport.h" #include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/Target/TargetRegInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Function.h" #include "llvm/iPHINode.h" #include "llvm/Pass.h" #include "llvm/Target/TargetRegInfo.h" #include "Support/CommandLine.h" #include "Support/LeakDetector.h" using std::vector; #include <vector> std::vector<MachineInstr*> FixConstantOperandsForInstr(Instruction* vmInstr, MachineInstr* minstr, Loading Loading @@ -66,7 +66,7 @@ namespace { TargetMachine &Target; void InsertCodeForPhis(Function &F); void InsertPhiElimInstructions(BasicBlock *BB, const vector<MachineInstr*>& CpVec); const std::vector<MachineInstr*>& CpVec); void SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt); void PostprocessMachineCodeForTree(InstructionNode* instrNode, int ruleForNode, short* nts); Loading @@ -89,9 +89,8 @@ TmpInstruction::TmpInstruction(MachineCodeForInstruction& mcfi, mcfi.addTemp(this); Operands.push_back(Use(s1, this)); // s1 must be non-null if (s2) { if (s2) Operands.push_back(Use(s2, this)); } // TmpInstructions should not be garbage checked. LeakDetector::removeGarbageObject(this); Loading @@ -106,8 +105,10 @@ TmpInstruction::TmpInstruction(MachineCodeForInstruction& mcfi, { mcfi.addTemp(this); if (s1) { Operands.push_back(Use(s1, this)); } if (s2) { Operands.push_back(Use(s2, this)); } if (s1) Operands.push_back(Use(s1, this)); if (s2) Operands.push_back(Use(s2, this)); // TmpInstructions should not be garbage checked. LeakDetector::removeGarbageObject(this); Loading @@ -121,8 +122,7 @@ bool InstructionSelection::runOnFunction(Function &F) // InstrForest instrForest(&F); if (SelectDebugLevel >= Select_DebugInstTrees) { if (SelectDebugLevel >= Select_DebugInstTrees) { std::cerr << "\n\n*** Input to instruction selection for function " << F.getName() << "\n\n" << F << "\n\n*** Instruction trees for function " Loading @@ -134,16 +134,14 @@ bool InstructionSelection::runOnFunction(Function &F) // Invoke BURG instruction selection for each tree // for (InstrForest::const_root_iterator RI = instrForest.roots_begin(); RI != instrForest.roots_end(); ++RI) { RI != instrForest.roots_end(); ++RI) { InstructionNode* basicNode = *RI; assert(basicNode->parent() == NULL && "A `root' node has a parent?"); // Invoke BURM to label each tree node with a state burm_label(basicNode); if (SelectDebugLevel >= Select_DebugBurgTrees) { if (SelectDebugLevel >= Select_DebugBurgTrees) { printcover(basicNode, 1, 0); std::cerr << "\nCover cost == " << treecost(basicNode, 1, 0) <<"\n\n"; printMatches(basicNode); Loading Loading @@ -172,8 +170,7 @@ bool InstructionSelection::runOnFunction(Function &F) // Insert phi elimination code InsertCodeForPhis(F); if (SelectDebugLevel >= Select_PrintMachineCode) { if (SelectDebugLevel >= Select_PrintMachineCode) { std::cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n"; MachineFunction::get(&F).dump(); } Loading @@ -187,8 +184,7 @@ bool InstructionSelection::runOnFunction(Function &F) //------------------------------------------------------------------------- void InstructionSelection::InsertCodeForPhis(Function &F) { InstructionSelection::InsertCodeForPhis(Function &F) { // for all basic blocks in function // MachineFunction &MF = MachineFunction::get(&F); Loading @@ -207,12 +203,12 @@ InstructionSelection::InsertCodeForPhis(Function &F) // for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) { // insert the copy instruction to the predecessor BB vector<MachineInstr*> mvec, CpVec; std::vector<MachineInstr*> mvec, CpVec; Target.getRegInfo().cpValue2Value(PN->getIncomingValue(i), PhiCpRes, mvec); for (vector<MachineInstr*>::iterator MI=mvec.begin(); for (std::vector<MachineInstr*>::iterator MI=mvec.begin(); MI != mvec.end(); ++MI) { vector<MachineInstr*> CpVec2 = std::vector<MachineInstr*> CpVec2 = FixConstantOperandsForInstr(const_cast<PHINode*>(PN), *MI, Target); CpVec2.push_back(*MI); CpVec.insert(CpVec.end(), CpVec2.begin(), CpVec2.end()); Loading @@ -221,7 +217,7 @@ InstructionSelection::InsertCodeForPhis(Function &F) InsertPhiElimInstructions(PN->getIncomingBlock(i), CpVec); } vector<MachineInstr*> mvec; std::vector<MachineInstr*> mvec; Target.getRegInfo().cpValue2Value(PhiCpRes, const_cast<PHINode*>(PN), mvec); BB->insert(BB->begin(), mvec.begin(), mvec.end()); Loading @@ -236,7 +232,7 @@ InstructionSelection::InsertCodeForPhis(Function &F) void InstructionSelection::InsertPhiElimInstructions(BasicBlock *BB, const vector<MachineInstr*>& CpVec) const std::vector<MachineInstr*>& CpVec) { Instruction *TermInst = (Instruction*)BB->getTerminator(); MachineCodeForInstruction &MC4Term = MachineCodeForInstruction::get(TermInst); Loading Loading @@ -304,9 +300,8 @@ InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot, // (If this is a list node, not an instruction, then skip this step). // This function is specific to the target architecture. // if (treeRoot->opLabel != VRegListOp) { vector<MachineInstr*> minstrVec; if (treeRoot->opLabel != VRegListOp) { std::vector<MachineInstr*> minstrVec; InstructionNode* instrNode = (InstructionNode*)treeRoot; assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode); Loading @@ -320,8 +315,8 @@ InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot, // Then, recursively compile the child nodes, if any. // if (nts[0]) { // i.e., there is at least one kid if (nts[0]) { // i.e., there is at least one kid InstrTreeNode* kids[2]; int currentRule = ruleForNode; burm_kids(treeRoot, currentRule, kids); Loading @@ -329,8 +324,7 @@ InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot, // First skip over any chain rules so that we don't visit // the current node again. // while (ThisIsAChainRule(currentRule)) { while (ThisIsAChainRule(currentRule)) { currentRule = burm_rule(treeRoot->state, nts[0]); nts = burm_nts[currentRule]; burm_kids(treeRoot, currentRule, kids); Loading @@ -339,8 +333,7 @@ InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot, // Now we have the first non-chain rule so we have found // the actual child nodes. Recursively compile them. // for (unsigned i = 0; nts[i]; i++) { for (unsigned i = 0; nts[i]; i++) { assert(i < 2); InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType(); if (nodeType == InstrTreeNode::NTVRegListNode || Loading Loading @@ -373,9 +366,8 @@ InstructionSelection::PostprocessMachineCodeForTree(InstructionNode* instrNode, // Instruction* vmInstr = instrNode->getInstruction(); MachineCodeForInstruction &mvec = MachineCodeForInstruction::get(vmInstr); for (unsigned i = mvec.size(); i != 0; --i) { vector<MachineInstr*> loadConstVec = for (unsigned i = mvec.size(); i != 0; --i) { std::vector<MachineInstr*> loadConstVec = FixConstantOperandsForInstr(vmInstr, mvec[i-1], Target); mvec.insert(mvec.begin()+i-1, loadConstVec.begin(), loadConstVec.end()); Loading llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp +50 −57 Original line number Diff line number Diff line Loading @@ -66,14 +66,11 @@ ChooseRegOrImmed(int64_t intValue, getImmedValue = 0; if (canUseImmed && target.getInstrInfo().constantFitsInImmedField(opCode, intValue)) { target.getInstrInfo().constantFitsInImmedField(opCode, intValue)) { opType = isSigned? MachineOperand::MO_SignExtendedImmed : MachineOperand::MO_UnextendedImmed; getImmedValue = intValue; } else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0) { } else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0) { opType = MachineOperand::MO_MachineRegister; getMachineRegNum = target.getRegInfo().getZeroRegNum(); } Loading Loading @@ -158,8 +155,7 @@ FixConstantOperandsForInstr(Instruction* vmInstr, MachineOperand::MO_VirtualRegister; // Operand may be a virtual register or a compile-time constant if (mop.getType() == MachineOperand::MO_VirtualRegister) { if (mop.getType() == MachineOperand::MO_VirtualRegister) { assert(mop.getVRegValue() != NULL); opValue = mop.getVRegValue(); if (Constant *opConst = dyn_cast<Constant>(opValue)) { Loading @@ -169,9 +165,7 @@ FixConstantOperandsForInstr(Instruction* vmInstr, if (opType == MachineOperand::MO_VirtualRegister) constantThatMustBeLoaded = true; } } else { } else { assert(mop.isImmediate()); bool isSigned = mop.getType() == MachineOperand::MO_SignExtendedImmed; Loading @@ -196,8 +190,7 @@ FixConstantOperandsForInstr(Instruction* vmInstr, if (opType == mop.getType()) continue; // no change: this is the most common case if (opType == MachineOperand::MO_VirtualRegister) { if (opType == MachineOperand::MO_VirtualRegister) { constantThatMustBeLoaded = true; opValue = isSigned ? (Value*)ConstantSInt::get(Type::LongTy, immedValue) Loading Loading @@ -250,8 +243,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr, InsertCodeToLoadConstant(F, oldVal, vmInstr, MVec, target); minstr->setImplicitRef(i, tmpReg); if (isCall) { // find and replace the argument in the CallArgsDescriptor if (isCall) { // find and replace the argument in the CallArgsDescriptor unsigned i=lastCallArgNum; while (argDesc->getArgInfo(i).getArgVal() != oldVal) ++i; Loading Loading
llvm/lib/CodeGen/InstrSelection/InstrForest.cpp +130 −174 Original line number Diff line number Diff line Loading @@ -19,13 +19,13 @@ // //===----------------------------------------------------------------------===// #include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/Constant.h" #include "llvm/Function.h" #include "llvm/iTerminators.h" #include "llvm/iMemory.h" #include "llvm/Constant.h" #include "llvm/Type.h" #include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineInstr.h" #include "Support/STLExtras.h" #include "Config/alloca.h" Loading @@ -35,12 +35,10 @@ //------------------------------------------------------------------------ void InstrTreeNode::dump(int dumpChildren, int indent) const { InstrTreeNode::dump(int dumpChildren, int indent) const { dumpNode(indent); if (dumpChildren) { if (dumpChildren) { if (LeftChild) LeftChild->dump(dumpChildren, indent+1); if (RightChild) Loading @@ -50,50 +48,35 @@ InstrTreeNode::dump(int dumpChildren, int indent) const InstructionNode::InstructionNode(Instruction* I) : InstrTreeNode(NTInstructionNode, I), codeIsFoldedIntoParent(false) : InstrTreeNode(NTInstructionNode, I), codeIsFoldedIntoParent(false) { opLabel = I->getOpcode(); // Distinguish special cases of some instructions such as Ret and Br // if (opLabel == Instruction::Ret && cast<ReturnInst>(I)->getReturnValue()) { if (opLabel == Instruction::Ret && cast<ReturnInst>(I)->getReturnValue()) { opLabel = RetValueOp; // ret(value) operation } else if (opLabel ==Instruction::Br && !cast<BranchInst>(I)->isUnconditional()) { opLabel = BrCondOp; // br(cond) operation } else if (opLabel >= Instruction::SetEQ && opLabel <= Instruction::SetGT) { } else if (opLabel >= Instruction::SetEQ && opLabel <= Instruction::SetGT) { opLabel = SetCCOp; // common label for all SetCC ops } else if (opLabel == Instruction::Alloca && I->getNumOperands() > 0) { } else if (opLabel == Instruction::Alloca && I->getNumOperands() > 0) { opLabel = AllocaN; // Alloca(ptr, N) operation } else if (opLabel == Instruction::GetElementPtr && cast<GetElementPtrInst>(I)->hasIndices()) { } else if (opLabel == Instruction::GetElementPtr && cast<GetElementPtrInst>(I)->hasIndices()) { opLabel = opLabel + 100; // getElem with index vector } else if (opLabel == Instruction::Xor && BinaryOperator::isNot(I)) { } else if (opLabel == Instruction::Xor && BinaryOperator::isNot(I)) { opLabel = (I->getType() == Type::BoolTy)? NotOp // boolean Not operator : BNotOp; // bitwise Not operator } else if (opLabel == Instruction::And || opLabel == Instruction::Or || opLabel == Instruction::Xor) { } else if (opLabel == Instruction::And || opLabel == Instruction::Or || opLabel == Instruction::Xor) { // Distinguish bitwise operators from logical operators! if (I->getType() != Type::BoolTy) opLabel = opLabel + 100; // bitwise operator } else if (opLabel == Instruction::Cast) { } else if (opLabel == Instruction::Cast) { const Type *ITy = I->getType(); switch(ITy->getPrimitiveID()) { Loading @@ -119,18 +102,15 @@ InstructionNode::InstructionNode(Instruction* I) void InstructionNode::dumpNode(int indent) const { InstructionNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; std::cerr << getInstruction()->getOpcodeName() << " [label " << getOpLabel() << "]" << "\n"; } void VRegListNode::dumpNode(int indent) const { VRegListNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; Loading @@ -139,8 +119,7 @@ VRegListNode::dumpNode(int indent) const void VRegNode::dumpNode(int indent) const { VRegNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; Loading @@ -149,8 +128,7 @@ VRegNode::dumpNode(int indent) const } void ConstantNode::dumpNode(int indent) const { ConstantNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; Loading @@ -158,9 +136,7 @@ ConstantNode::dumpNode(int indent) const << (int) getValue()->getValueType() << ")" << "\n"; } void LabelNode::dumpNode(int indent) const { void LabelNode::dumpNode(int indent) const { for (int i=0; i < indent; i++) std::cerr << " "; Loading @@ -173,56 +149,46 @@ LabelNode::dumpNode(int indent) const // A forest of instruction trees, usually for a single method. //------------------------------------------------------------------------ InstrForest::InstrForest(Function *F) { InstrForest::InstrForest(Function *F) { for (Function::iterator BB = F->begin(), FE = F->end(); BB != FE; ++BB) { for(BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) buildTreeForInstruction(I); } } InstrForest::~InstrForest() { InstrForest::~InstrForest() { for_each(treeRoots.begin(), treeRoots.end(), deleter<InstructionNode>); } void InstrForest::dump() const { void InstrForest::dump() const { for (const_root_iterator I = roots_begin(); I != roots_end(); ++I) (*I)->dump(/*dumpChildren*/ 1, /*indent*/ 0); } inline void InstrForest::eraseRoot(InstructionNode* node) { inline void InstrForest::eraseRoot(InstructionNode* node) { for (RootSet::reverse_iterator RI=treeRoots.rbegin(), RE=treeRoots.rend(); RI != RE; ++RI) if (*RI == node) treeRoots.erase(RI.base()-1); } inline void InstrForest::noteTreeNodeForInstr(Instruction *instr, InstructionNode *treeNode) { inline void InstrForest::noteTreeNodeForInstr(Instruction *instr, InstructionNode *treeNode) { (*this)[instr] = treeNode; treeRoots.push_back(treeNode); // mark node as root of a new tree } inline void InstrForest::setLeftChild(InstrTreeNode *parent, InstrTreeNode *child) { inline void InstrForest::setLeftChild(InstrTreeNode *parent, InstrTreeNode *child) { parent->LeftChild = child; child->Parent = parent; if (InstructionNode* instrNode = dyn_cast<InstructionNode>(child)) eraseRoot(instrNode); // no longer a tree root } inline void InstrForest::setRightChild(InstrTreeNode *parent, InstrTreeNode *child) { inline void InstrForest::setRightChild(InstrTreeNode *parent, InstrTreeNode *child) { parent->RightChild = child; child->Parent = parent; if (InstructionNode* instrNode = dyn_cast<InstructionNode>(child)) Loading @@ -230,12 +196,9 @@ InstrForest::setRightChild(InstrTreeNode *parent, InstrTreeNode *child) } InstructionNode* InstrForest::buildTreeForInstruction(Instruction *instr) { InstructionNode* InstrForest::buildTreeForInstruction(Instruction *instr) { InstructionNode *treeNode = getTreeNodeForInstr(instr); if (treeNode) { if (treeNode) { // treeNode has already been constructed for this instruction assert(treeNode->getInstruction() == instr); return treeNode; Loading @@ -246,8 +209,8 @@ InstrForest::buildTreeForInstruction(Instruction *instr) treeNode = new InstructionNode(instr); noteTreeNodeForInstr(instr, treeNode); if (instr->getOpcode() == Instruction::Call) { // Operands of call instruction if (instr->getOpcode() == Instruction::Call) { // Operands of call instruction return treeNode; } Loading Loading @@ -311,14 +274,10 @@ InstrForest::buildTreeForInstruction(Instruction *instr) { // Recursively create a treeNode for it. opTreeNode = buildTreeForInstruction((Instruction*)operand); } else if (Constant *CPV = dyn_cast<Constant>(operand)) { } else if (Constant *CPV = dyn_cast<Constant>(operand)) { // Create a leaf node for a constant opTreeNode = new ConstantNode(CPV); } else { } else { // Create a leaf node for the virtual register opTreeNode = new VRegNode(operand); } Loading @@ -338,8 +297,7 @@ InstrForest::buildTreeForInstruction(Instruction *instr) InstrTreeNode *parent = treeNode; if (numChildren > 2) { if (numChildren > 2) { unsigned instrOpcode = treeNode->getInstruction()->getOpcode(); assert(instrOpcode == Instruction::PHI || instrOpcode == Instruction::Call || Loading @@ -355,8 +313,7 @@ InstrForest::buildTreeForInstruction(Instruction *instr) int n; // Create a list node for children 2 .. N-1, if any for (n = numChildren-1; n >= 2; n--) { for (n = numChildren-1; n >= 2; n--) { // We have more than two children InstrTreeNode *listNode = new VRegListNode(); setRightChild(parent, listNode); Loading @@ -365,8 +322,7 @@ InstrForest::buildTreeForInstruction(Instruction *instr) } // Now insert the last remaining child (if any). if (numChildren >= 2) { if (numChildren >= 2) { assert(n == 1); setRightChild(parent, childArray[numChildren - 1]); } Loading
llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp +79 −87 Original line number Diff line number Diff line Loading @@ -14,19 +14,19 @@ // //===----------------------------------------------------------------------===// #include "llvm/Function.h" #include "llvm/iPHINode.h" #include "llvm/Pass.h" #include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/InstrSelection.h" #include "llvm/CodeGen/InstrSelectionSupport.h" #include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/Target/TargetRegInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Function.h" #include "llvm/iPHINode.h" #include "llvm/Pass.h" #include "llvm/Target/TargetRegInfo.h" #include "Support/CommandLine.h" #include "Support/LeakDetector.h" using std::vector; #include <vector> std::vector<MachineInstr*> FixConstantOperandsForInstr(Instruction* vmInstr, MachineInstr* minstr, Loading Loading @@ -66,7 +66,7 @@ namespace { TargetMachine &Target; void InsertCodeForPhis(Function &F); void InsertPhiElimInstructions(BasicBlock *BB, const vector<MachineInstr*>& CpVec); const std::vector<MachineInstr*>& CpVec); void SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt); void PostprocessMachineCodeForTree(InstructionNode* instrNode, int ruleForNode, short* nts); Loading @@ -89,9 +89,8 @@ TmpInstruction::TmpInstruction(MachineCodeForInstruction& mcfi, mcfi.addTemp(this); Operands.push_back(Use(s1, this)); // s1 must be non-null if (s2) { if (s2) Operands.push_back(Use(s2, this)); } // TmpInstructions should not be garbage checked. LeakDetector::removeGarbageObject(this); Loading @@ -106,8 +105,10 @@ TmpInstruction::TmpInstruction(MachineCodeForInstruction& mcfi, { mcfi.addTemp(this); if (s1) { Operands.push_back(Use(s1, this)); } if (s2) { Operands.push_back(Use(s2, this)); } if (s1) Operands.push_back(Use(s1, this)); if (s2) Operands.push_back(Use(s2, this)); // TmpInstructions should not be garbage checked. LeakDetector::removeGarbageObject(this); Loading @@ -121,8 +122,7 @@ bool InstructionSelection::runOnFunction(Function &F) // InstrForest instrForest(&F); if (SelectDebugLevel >= Select_DebugInstTrees) { if (SelectDebugLevel >= Select_DebugInstTrees) { std::cerr << "\n\n*** Input to instruction selection for function " << F.getName() << "\n\n" << F << "\n\n*** Instruction trees for function " Loading @@ -134,16 +134,14 @@ bool InstructionSelection::runOnFunction(Function &F) // Invoke BURG instruction selection for each tree // for (InstrForest::const_root_iterator RI = instrForest.roots_begin(); RI != instrForest.roots_end(); ++RI) { RI != instrForest.roots_end(); ++RI) { InstructionNode* basicNode = *RI; assert(basicNode->parent() == NULL && "A `root' node has a parent?"); // Invoke BURM to label each tree node with a state burm_label(basicNode); if (SelectDebugLevel >= Select_DebugBurgTrees) { if (SelectDebugLevel >= Select_DebugBurgTrees) { printcover(basicNode, 1, 0); std::cerr << "\nCover cost == " << treecost(basicNode, 1, 0) <<"\n\n"; printMatches(basicNode); Loading Loading @@ -172,8 +170,7 @@ bool InstructionSelection::runOnFunction(Function &F) // Insert phi elimination code InsertCodeForPhis(F); if (SelectDebugLevel >= Select_PrintMachineCode) { if (SelectDebugLevel >= Select_PrintMachineCode) { std::cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n"; MachineFunction::get(&F).dump(); } Loading @@ -187,8 +184,7 @@ bool InstructionSelection::runOnFunction(Function &F) //------------------------------------------------------------------------- void InstructionSelection::InsertCodeForPhis(Function &F) { InstructionSelection::InsertCodeForPhis(Function &F) { // for all basic blocks in function // MachineFunction &MF = MachineFunction::get(&F); Loading @@ -207,12 +203,12 @@ InstructionSelection::InsertCodeForPhis(Function &F) // for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) { // insert the copy instruction to the predecessor BB vector<MachineInstr*> mvec, CpVec; std::vector<MachineInstr*> mvec, CpVec; Target.getRegInfo().cpValue2Value(PN->getIncomingValue(i), PhiCpRes, mvec); for (vector<MachineInstr*>::iterator MI=mvec.begin(); for (std::vector<MachineInstr*>::iterator MI=mvec.begin(); MI != mvec.end(); ++MI) { vector<MachineInstr*> CpVec2 = std::vector<MachineInstr*> CpVec2 = FixConstantOperandsForInstr(const_cast<PHINode*>(PN), *MI, Target); CpVec2.push_back(*MI); CpVec.insert(CpVec.end(), CpVec2.begin(), CpVec2.end()); Loading @@ -221,7 +217,7 @@ InstructionSelection::InsertCodeForPhis(Function &F) InsertPhiElimInstructions(PN->getIncomingBlock(i), CpVec); } vector<MachineInstr*> mvec; std::vector<MachineInstr*> mvec; Target.getRegInfo().cpValue2Value(PhiCpRes, const_cast<PHINode*>(PN), mvec); BB->insert(BB->begin(), mvec.begin(), mvec.end()); Loading @@ -236,7 +232,7 @@ InstructionSelection::InsertCodeForPhis(Function &F) void InstructionSelection::InsertPhiElimInstructions(BasicBlock *BB, const vector<MachineInstr*>& CpVec) const std::vector<MachineInstr*>& CpVec) { Instruction *TermInst = (Instruction*)BB->getTerminator(); MachineCodeForInstruction &MC4Term = MachineCodeForInstruction::get(TermInst); Loading Loading @@ -304,9 +300,8 @@ InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot, // (If this is a list node, not an instruction, then skip this step). // This function is specific to the target architecture. // if (treeRoot->opLabel != VRegListOp) { vector<MachineInstr*> minstrVec; if (treeRoot->opLabel != VRegListOp) { std::vector<MachineInstr*> minstrVec; InstructionNode* instrNode = (InstructionNode*)treeRoot; assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode); Loading @@ -320,8 +315,8 @@ InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot, // Then, recursively compile the child nodes, if any. // if (nts[0]) { // i.e., there is at least one kid if (nts[0]) { // i.e., there is at least one kid InstrTreeNode* kids[2]; int currentRule = ruleForNode; burm_kids(treeRoot, currentRule, kids); Loading @@ -329,8 +324,7 @@ InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot, // First skip over any chain rules so that we don't visit // the current node again. // while (ThisIsAChainRule(currentRule)) { while (ThisIsAChainRule(currentRule)) { currentRule = burm_rule(treeRoot->state, nts[0]); nts = burm_nts[currentRule]; burm_kids(treeRoot, currentRule, kids); Loading @@ -339,8 +333,7 @@ InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot, // Now we have the first non-chain rule so we have found // the actual child nodes. Recursively compile them. // for (unsigned i = 0; nts[i]; i++) { for (unsigned i = 0; nts[i]; i++) { assert(i < 2); InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType(); if (nodeType == InstrTreeNode::NTVRegListNode || Loading Loading @@ -373,9 +366,8 @@ InstructionSelection::PostprocessMachineCodeForTree(InstructionNode* instrNode, // Instruction* vmInstr = instrNode->getInstruction(); MachineCodeForInstruction &mvec = MachineCodeForInstruction::get(vmInstr); for (unsigned i = mvec.size(); i != 0; --i) { vector<MachineInstr*> loadConstVec = for (unsigned i = mvec.size(); i != 0; --i) { std::vector<MachineInstr*> loadConstVec = FixConstantOperandsForInstr(vmInstr, mvec[i-1], Target); mvec.insert(mvec.begin()+i-1, loadConstVec.begin(), loadConstVec.end()); Loading
llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp +50 −57 Original line number Diff line number Diff line Loading @@ -66,14 +66,11 @@ ChooseRegOrImmed(int64_t intValue, getImmedValue = 0; if (canUseImmed && target.getInstrInfo().constantFitsInImmedField(opCode, intValue)) { target.getInstrInfo().constantFitsInImmedField(opCode, intValue)) { opType = isSigned? MachineOperand::MO_SignExtendedImmed : MachineOperand::MO_UnextendedImmed; getImmedValue = intValue; } else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0) { } else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0) { opType = MachineOperand::MO_MachineRegister; getMachineRegNum = target.getRegInfo().getZeroRegNum(); } Loading Loading @@ -158,8 +155,7 @@ FixConstantOperandsForInstr(Instruction* vmInstr, MachineOperand::MO_VirtualRegister; // Operand may be a virtual register or a compile-time constant if (mop.getType() == MachineOperand::MO_VirtualRegister) { if (mop.getType() == MachineOperand::MO_VirtualRegister) { assert(mop.getVRegValue() != NULL); opValue = mop.getVRegValue(); if (Constant *opConst = dyn_cast<Constant>(opValue)) { Loading @@ -169,9 +165,7 @@ FixConstantOperandsForInstr(Instruction* vmInstr, if (opType == MachineOperand::MO_VirtualRegister) constantThatMustBeLoaded = true; } } else { } else { assert(mop.isImmediate()); bool isSigned = mop.getType() == MachineOperand::MO_SignExtendedImmed; Loading @@ -196,8 +190,7 @@ FixConstantOperandsForInstr(Instruction* vmInstr, if (opType == mop.getType()) continue; // no change: this is the most common case if (opType == MachineOperand::MO_VirtualRegister) { if (opType == MachineOperand::MO_VirtualRegister) { constantThatMustBeLoaded = true; opValue = isSigned ? (Value*)ConstantSInt::get(Type::LongTy, immedValue) Loading Loading @@ -250,8 +243,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr, InsertCodeToLoadConstant(F, oldVal, vmInstr, MVec, target); minstr->setImplicitRef(i, tmpReg); if (isCall) { // find and replace the argument in the CallArgsDescriptor if (isCall) { // find and replace the argument in the CallArgsDescriptor unsigned i=lastCallArgNum; while (argDesc->getArgInfo(i).getArgVal() != oldVal) ++i; Loading