Unverified Commit c75e1e62 authored by Alexey Bataev's avatar Alexey Bataev Committed by GitHub
Browse files

[SLP] Check for instruction before casting 

Values can be transformed during earlier attempts for vectorization, so
need to check if they are still instructions to avoid a compiler crash.

Fixes #195607

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/195635
parent afb0a939

llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

+5 −4
Original line number Diff line number Diff line
@@ -31124,11 +31124,12 @@ bool SLPVectorizerPass::vectorizeChainsInBlock(BasicBlock *BB, BoUpSLP &R) { 
      Type *ScalarTy = getValueType(PostProcessStores.front());

      if (!::isValidElementType(ScalarTy))

        return Changed;

      auto *IF =

          dyn_cast<Instruction>(PostProcessStores.front()->getValueOperand());

      auto *IB =

          dyn_cast<Instruction>(PostProcessStores.back()->getValueOperand());

      if (!NonVectReductions && PostProcessStores.size() == 2 &&

          cast<Instruction>(PostProcessStores.front()->getValueOperand())

                  ->getOpcode() !=

              cast<Instruction>(PostProcessStores.back()->getValueOperand())

                  ->getOpcode())

          (!IF || !IB || IF->getOpcode() != IB->getOpcode()))

        return Changed;

      ScalarTy =

          IntegerType::get(ScalarTy->getContext(),

llvm/test/Transforms/SLPVectorizer/X86/post-stores-non-inst-ops.ll

0 → 100644
+18 −0
Original line number Diff line number Diff line 
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6

; RUN: opt --passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s



define i32 @test() {

; CHECK-LABEL: define i32 @test() {

; CHECK-NEXT:  [[ENTRY:.*:]]

; CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr null, align 1

; CHECK-NEXT:    store i8 [[TMP0]], ptr null, align 1

; CHECK-NEXT:    store i32 0, ptr null, align 4

; CHECK-NEXT:    ret i32 0

;

entry:

  %0 = load i8, ptr null, align 1

  store i8 %0, ptr null, align 1

  %and = and i32 0, 0

  store i32 %and, ptr null, align 4

  ret i32 %and

}