Commit c2ad7ee1 authored by Stanislav Mekhanoshin's avatar Stanislav Mekhanoshin
Browse files

[AMDGPU] override isHighLatencyDef 

SIMachineScheduler uses isHighLatencyInstruction with the same
sematincs, but TargetInstrInfo has virtual isHighLatencyDef
method, so override it instead.

Added FLAT to the list of high latency opcodes and a check for
mayLoad since stores are not technically high latency in terms
of data dependency.

This change did not produce any visible impact on our tests.

Differential Revision: https://reviews.llvm.org/D73582
parent f717483a

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

+3 −4
Original line number Diff line number Diff line
@@ -6005,10 +6005,9 @@ bool SIInstrInfo::isLowLatencyInstruction(const MachineInstr &MI) const { 
  return isSMRD(Opc);

}



bool SIInstrInfo::isHighLatencyInstruction(const MachineInstr &MI) const {

  unsigned Opc = MI.getOpcode();



  return isMUBUF(Opc) || isMTBUF(Opc) || isMIMG(Opc);

bool SIInstrInfo::isHighLatencyDef(int Opc) const {

  return get(Opc).mayLoad() &&

         (isMUBUF(Opc) || isMTBUF(Opc) || isMIMG(Opc) || isFLAT(Opc));

}



unsigned SIInstrInfo::isStackAccess(const MachineInstr &MI,

llvm/lib/Target/AMDGPU/SIInstrInfo.h

+1 −1
Original line number Diff line number Diff line
@@ -931,7 +931,7 @@ public: 
  uint64_t getScratchRsrcWords23() const;



  bool isLowLatencyInstruction(const MachineInstr &MI) const;

  bool isHighLatencyInstruction(const MachineInstr &MI) const;

  bool isHighLatencyDef(int Opc) const override;



  /// Return the descriptor of the target-specific machine instruction

  /// that corresponds to the specified pseudo or native opcode.

llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp

+1 −1
Original line number Diff line number Diff line
@@ -1955,7 +1955,7 @@ void SIScheduleDAGMI::schedule() 
      if (SITII->getMemOperandWithOffset(*SU->getInstr(), BaseLatOp, OffLatReg,

                                         TRI))

        LowLatencyOffset[i] = OffLatReg;

    } else if (SITII->isHighLatencyInstruction(*SU->getInstr()))

    } else if (SITII->isHighLatencyDef(SU->getInstr()->getOpcode()))

      IsHighLatencySU[i] = 1;

  }