Commit b63629a5 authored by Matt Arsenault's avatar Matt Arsenault
Browse files

GlobalISel: Fix mask computation in lowerInsert 

This is supposed to be the high bit index, not the width. Use the
wrapping form of getBitsSet and avoid the bitflip.
parent 68b102b9

llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

+3 −2
Original line number Diff line number Diff line
@@ -4646,8 +4646,9 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerInsert(MachineInstr &MI) { 
      ExtInsSrc = MIRBuilder.buildShl(IntDstTy, ExtInsSrc, ShiftAmt).getReg(0);

    }



    APInt MaskVal = ~APInt::getBitsSet(DstTy.getSizeInBits(), Offset,

                                       InsertTy.getSizeInBits());

    APInt MaskVal = APInt::getBitsSetWithWrap(DstTy.getSizeInBits(),

                                              Offset + InsertTy.getSizeInBits(),

                                              Offset);



    auto Mask = MIRBuilder.buildConstant(IntDstTy, MaskVal);

    auto MaskedSrc = MIRBuilder.buildAnd(IntDstTy, Src, Mask);

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir

+5 −7
Original line number Diff line number Diff line
@@ -793,7 +793,7 @@ body: | 
    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]

    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1

    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)

    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65535

    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -131071

    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C2]]

    ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]

    ; CHECK: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
@@ -819,8 +819,7 @@ body: | 
    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]

    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16

    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)

    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1

    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C2]]

    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C]]

    ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]

    ; CHECK: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)

    ; CHECK: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
@@ -1326,7 +1325,7 @@ body: | 
    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]

    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1

    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)

    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65535

    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -131071

    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]

    ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]

    ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[OR]](s32)
@@ -1352,7 +1351,7 @@ body: | 
    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]

    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8

    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)

    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65281

    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -16776961

    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]

    ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]

    ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[OR]](s32)
@@ -1378,8 +1377,7 @@ body: | 
    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]

    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16

    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)

    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1

    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]

    ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]

    ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]

    ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[OR]](s32)

    ; CHECK: $vgpr0 = COPY [[BITCAST]](s32)