Commit aeedc076 authored by Sacha Coppey's avatar Sacha Coppey Committed by Simon Pilgrim
Browse files

[IR] Add GraalVM calling conventions 

Adds GraalVM calling conventions. The only difference with the default calling conventions is that GraalVM reserves two registers for the heap base and the thread. Since the registers are then accessed by name, getRegisterByName has to be updated accordingly.

This patch implements the calling conventions only for X86, AArch64 and RISC-V.

For X86, the reserved registers are X14 and X15. For AArch64, they are X27 and X28. For RISC-V, they are X23 and X27.

This patch has been used by the LLVM backend of GraalVM's Native Image project in production for around 4 months with no major issues.

Differential Revision: https://reviews.llvm.org/D151107
parent 19e74589

llvm/include/llvm/AsmParser/LLToken.h

+1 −0
Original line number Diff line number Diff line
@@ -176,6 +176,7 @@ enum Kind { 
  kw_amdgpu_gfx,

  kw_tailcc,

  kw_m68k_rtdcc,

  kw_graalcc,



  // Attributes:

  kw_attributes,

llvm/include/llvm/IR/CallingConv.h

+3 −0
Original line number Diff line number Diff line
@@ -248,6 +248,9 @@ namespace CallingConv { 
    /// Used for M68k rtd-based CC (similar to X86's stdcall).

    M68k_RTD = 106,



    /// Used by GraalVM. Two additional registers are reserved.

    GRAAL = 107,



    /// The highest possible ID. Must be some 2^k - 1.

    MaxID = 1023

  };

llvm/lib/AsmParser/LLLexer.cpp

+1 −0
Original line number Diff line number Diff line
@@ -633,6 +633,7 @@ lltok::Kind LLLexer::LexIdentifier() { 
  KEYWORD(amdgpu_gfx);

  KEYWORD(tailcc);

  KEYWORD(m68k_rtdcc);

  KEYWORD(graalcc);



  KEYWORD(cc);

  KEYWORD(c);

llvm/lib/AsmParser/LLParser.cpp

+2 −0
Original line number Diff line number Diff line
@@ -1999,6 +1999,7 @@ void LLParser::parseOptionalDLLStorageClass(unsigned &Res) { 
///   ::= 'amdgpu_kernel'

///   ::= 'tailcc'

///   ::= 'm68k_rtdcc'

///   ::= 'graalcc'

///   ::= 'cc' UINT

///

bool LLParser::parseOptionalCallingConv(unsigned &CC) {
@@ -2067,6 +2068,7 @@ bool LLParser::parseOptionalCallingConv(unsigned &CC) { 
  case lltok::kw_amdgpu_kernel:  CC = CallingConv::AMDGPU_KERNEL; break;

  case lltok::kw_tailcc:         CC = CallingConv::Tail; break;

  case lltok::kw_m68k_rtdcc:     CC = CallingConv::M68k_RTD; break;

  case lltok::kw_graalcc:        CC = CallingConv::GRAAL; break;

  case lltok::kw_cc: {

      Lex.Lex();

      return parseUInt32(CC);

llvm/lib/IR/AsmWriter.cpp

+1 −0
Original line number Diff line number Diff line
@@ -307,6 +307,7 @@ static void PrintCallingConv(unsigned cc, raw_ostream &Out) { 
  case CallingConv::CXX_FAST_TLS:  Out << "cxx_fast_tlscc"; break;

  case CallingConv::GHC:           Out << "ghccc"; break;

  case CallingConv::Tail:          Out << "tailcc"; break;

  case CallingConv::GRAAL:         Out << "graalcc"; break;

  case CallingConv::CFGuard_Check: Out << "cfguard_checkcc"; break;

  case CallingConv::X86_StdCall:   Out << "x86_stdcallcc"; break;

  case CallingConv::X86_FastCall:  Out << "x86_fastcallcc"; break;