Commit a27fe017 authored by CVS to SVN Conversion's avatar CVS to SVN Conversion
Browse files

This commit was manufactured by cvs2svn to create branch 'release_13'. 

llvm-svn: 15548
parent 50640976

llvm/docs/ReleaseNotes.html

+11 −18
Original line number Diff line number Diff line
@@ -73,8 +73,7 @@ href="http://llvm.cs.uiuc.edu/releases/">releases page</a>.</p> 
release primarily improves the <a href="#codequality">performance of the

code</a> produced by all aspects of the LLVM compiler, adds many <a

href="#newfeatures">new features</a>, <a href="#bugfix">fixes a few

bugs</a>, speeds up the compiler, and introduces a new (experimental)

PowerPC code generator.</p>

bugs</a>, and speeds up the compiler.</p>



<p> At this time, LLVM is known to correctly compile and run all C &amp; C++

SPEC CPU95 &amp; 2000 benchmarks, the Olden benchmarks, and the Ptrdist
@@ -150,8 +149,6 @@ tablegen description of the target (before they were hand coded).</li> 
<li>All LLVM tools will now respond to the 

<a href="http://llvm.cs.uiuc.edu/PR413"><tt>--version</tt> option</a> which 

will tell you the version of LLVM on which the tool is based.</li>

<li>An experimental PowerPC backend has been added, capable of compiling several

SPEC benchmarks.</li>

</ol>



</div>
@@ -201,15 +198,13 @@ produced when linking C++ programs has been fixed.</li> 
Bytecode Reader</a></li>

<li><a href="http://llvm.cs.uiuc.edu/PR392">Global Vars Have (Somewhat) Limited 

  Type Range</a></li>

<li><a href="http://llvm.cs.uiuc.edu/PR341">operator&lt;&lt; on a Value* now

prints the address of the object instead of its contents.</a></li>

<li><a href="http://llvm.cs.uiuc.edu/PR341">operator&lt;&lt; on a Value* now prints the address of the object instead of its contents.</a></li>

<li><a href="http://llvm.cs.uiuc.edu/PR402">Bytecode Enhancements

  Needed</a></li>

<li><a href="http://llvm.cs.uiuc.edu/PR404">[loopsimplify] Loop simplify is

really slow on 252.eon</a></li>

<li><a href="Http://llvm.cs.uiuc.edu/PR122">[code-cleanup] SymbolTable class

cleanup, Type should not derive from Value, eliminate ConstantPointerRef

class</a>.</li>

<li><a href="http://llvm.cs.uiuc.edu/PR404">[loopsimplify] Loop simplify is really slow on 252.eon</a></li>

<li><a href="Http://llvm.cs.uiuc.edu/PR122">[code-cleanup] SymbolTable 

    class cleanup, Type should not derive from Value, eliminate 

    ConstantPointerRef class</a>.</li>

<li>The memory footprint of the LLVM IR has been reduced substantially.</li>

<li>The LLVM linker and many core classes have been sped up substantially.</li>

</ol>
@@ -350,12 +345,12 @@ initialized unsigned bitfields</a></li> 
<li>Intel and AMD machines running Red Hat Linux and FreeBSD (and probably 

    other unix-like systems).</li>

<li>Sun UltraSPARC workstations running Solaris 8.</li>

<li>PowerPC-based Mac OS X boxes, running 10.3 and above (C backend and 

    interpreter only, no native codegen is available yet).</li>

<li>Intel and AMD machines running on Win32 with the Cygwin libraries.</li>

<li>PowerPC-based Mac OS X boxes, running 10.2 and above.  Note that no JIT

support is available yet, and LLC support is beta.  The C backend can be used

to produce stable code for this platform.</li>

</ul>





<p>The core LLVM infrastructure uses

<a href="http://www.gnu.org/software/autoconf/">GNU autoconf</a> to adapt itself

to the machine and operating system on which it is built.  However, minor
@@ -401,11 +396,9 @@ useful to some people. In particular, if you would like to work on one of these 
components, please contact us on the llvmdev list.</p>



<ul>

<li>The PowerPC backend is incomplete and is known to miscompile several SPEC

benchmarks. The file <tt>llvm/lib/Target/PowerPC/README.txt</tt> has

details.</li>

<li>The following passes are incomplete or buggy: <tt>-pgmdep, -memdep,

    -ipmodref, -cee</tt></li>



<li>The <tt>-pre</tt> pass is incomplete (there are cases it doesn't handle that

    it should) and not thoroughly tested.</li>

<li>The <tt>llvm-ar</tt> tool is incomplete and probably buggy.</li>

llvm/lib/Target/PowerPC/PPC32AsmPrinter.cpp

deleted100644 → 0
+0 −735

File deleted.

Preview size limit exceeded, changes collapsed.

llvm/lib/Target/PowerPC/PPC32CodeEmitter.cpp

deleted100644 → 0
+0 −43
Original line number Diff line number Diff line 
//===-- PowerPCCodeEmitter.cpp - JIT Code Emitter for PowerPC -----*- C++ -*-=//

// 

//                     The LLVM Compiler Infrastructure

//

// This file was developed by the LLVM research group and is distributed under

// the University of Illinois Open Source License. See LICENSE.TXT for details.

// 

//===----------------------------------------------------------------------===//

// 

//

//===----------------------------------------------------------------------===//



#include "PowerPCTargetMachine.h"



namespace llvm {



/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get

/// machine code emitted.  This uses a MachineCodeEmitter object to handle

/// actually outputting the machine code and resolving things like the address

/// of functions.  This method should returns true if machine code emission is

/// not supported.

///

bool PowerPCTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,

                                                      MachineCodeEmitter &MCE) {

  return true;

  // It should go something like this:

  // PM.add(new Emitter(MCE));  // Machine code emitter pass for PowerPC

  // Delete machine code for this function after emitting it:

  // PM.add(createMachineCodeDeleter());

}



void *PowerPCJITInfo::getJITStubForFunction(Function *F,

                                            MachineCodeEmitter &MCE) {

  assert (0 && "PowerPCJITInfo::getJITStubForFunction not implemented");

  return 0;

}



void PowerPCJITInfo::replaceMachineCodeForFunction (void *Old, void *New) {

  assert (0 && "PowerPCJITInfo::replaceMachineCodeForFunction not implemented");

}



} // end llvm namespace

llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp

deleted100644 → 0
+0 −3343

File deleted.

Preview size limit exceeded, changes collapsed.

llvm/lib/Target/SparcV8/DelaySlotFiller.cpp

deleted100644 → 0
+0 −112
Original line number Diff line number Diff line 
//===-- DelaySlotFiller.cpp - SparcV8 delay slot filler -------------------===//

// 

//                     The LLVM Compiler Infrastructure

//

// This file was developed by the LLVM research group and is distributed under

// the University of Illinois Open Source License. See LICENSE.TXT for details.

// 

//===----------------------------------------------------------------------===//

//

// Simple local delay slot filler for SparcV8 machine code

//

//===----------------------------------------------------------------------===//



#include "SparcV8.h"

#include "llvm/CodeGen/MachineFunctionPass.h"

#include "llvm/CodeGen/MachineInstrBuilder.h"

#include "Support/Statistic.h"



using namespace llvm;



namespace {

  Statistic<> FilledSlots ("delayslotfiller", "Num. of delay slots filled");



  struct Filler : public MachineFunctionPass {

    /// Target machine description which we query for reg. names, data

    /// layout, etc.

    ///

    TargetMachine &TM;



    Filler (TargetMachine &tm) : TM (tm) { }



    virtual const char *getPassName () const {

      return "SparcV8 Delay Slot Filler";

    }



    bool runOnMachineBasicBlock (MachineBasicBlock &MBB);

    bool runOnMachineFunction (MachineFunction &F) {

      bool Changed = false;

      for (MachineFunction::iterator FI = F.begin (), FE = F.end ();

           FI != FE; ++FI)

        Changed |= runOnMachineBasicBlock (*FI);

      return Changed;

    }



  };

} // end of anonymous namespace



/// createSparcV8DelaySlotFillerPass - Returns a pass that fills in delay

/// slots in SparcV8 MachineFunctions

///

FunctionPass *llvm::createSparcV8DelaySlotFillerPass (TargetMachine &tm) {

  return new Filler (tm);

}



static bool hasDelaySlot (unsigned Opcode) {

  switch (Opcode) {

    case V8::BA:

    case V8::BCC:

    case V8::BCS:

    case V8::BE:

    case V8::BG:

    case V8::BGE:

    case V8::BGU:

    case V8::BL:

    case V8::BLE:

    case V8::BLEU:

    case V8::BNE:

    case V8::CALL:

    case V8::JMPLrr:

    case V8::RETL:

    case V8::FBA:

    case V8::FBN:

    case V8::FBU:

    case V8::FBG:

    case V8::FBUG:

    case V8::FBL:

    case V8::FBUL:

    case V8::FBLG:

    case V8::FBNE:

    case V8::FBE:

    case V8::FBUE:

    case V8::FBGE:

    case V8::FBUGE:

    case V8::FBLE:

    case V8::FBULE:

    case V8::FBO:

    case V8::FCMPS:

    case V8::FCMPD:

    case V8::FCMPES:

    case V8::FCMPED:

      return true;

    default:

      return false;

  }

}



/// runOnMachineBasicBlock - Fill in delay slots for the given basic block.

/// Currently, we fill delay slots with NOPs. We assume there is only one

/// delay slot per delayed instruction.

///

bool Filler::runOnMachineBasicBlock (MachineBasicBlock &MBB) {

  bool Changed = false;

  for (MachineBasicBlock::iterator I = MBB.begin (); I != MBB.end (); ++I)

    if (hasDelaySlot (I->getOpcode ())) {

      MachineBasicBlock::iterator J = I;

      ++J;

      BuildMI (MBB, J, V8::NOP, 0);

      ++FilledSlots;

      Changed = true;

    }

  return Changed;

}