Commit a19a56f6 authored by Graham Sellers's avatar Graham Sellers Committed by Matt Arsenault
Browse files

[AMDGPU] Extend constant folding for logical operations 

This patch extends existing constant folding in logical operations to
handle S_XNOR, S_NAND, S_NOR, S_ANDN2, S_ORN2, V_LSHL_ADD_U32 and
V_AND_OR_B32. Also added a couple of tests for existing folds.
parent c41685b1

llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

+22 −1
Original line number Diff line number Diff line
@@ -914,6 +914,21 @@ static bool evalBinaryInstruction(unsigned Opcode, int32_t &Result, 
  case AMDGPU::S_XOR_B32:

    Result = LHS ^ RHS;

    return true;

  case AMDGPU::S_XNOR_B32:

    Result = ~(LHS ^ RHS);

    return true;

  case AMDGPU::S_NAND_B32:

    Result = ~(LHS & RHS);

    return true;

  case AMDGPU::S_NOR_B32:

    Result = ~(LHS | RHS);

    return true;

  case AMDGPU::S_ANDN2_B32:

    Result = LHS & ~RHS;

    return true;

  case AMDGPU::S_ORN2_B32:

    Result = LHS | ~RHS;

    return true;

  case AMDGPU::V_LSHL_B32_e64:

  case AMDGPU::V_LSHL_B32_e32:

  case AMDGPU::S_LSHL_B32:
@@ -1014,10 +1029,16 @@ static bool tryConstantFoldOp(MachineRegisterInfo &MRI, 
  if (!Src0->isImm() && !Src1->isImm())

    return false;



  if (MI->getOpcode() == AMDGPU::V_LSHL_OR_B32) {

  if (MI->getOpcode() == AMDGPU::V_LSHL_OR_B32 ||

      MI->getOpcode() == AMDGPU::V_LSHL_ADD_U32 ||

      MI->getOpcode() == AMDGPU::V_AND_OR_B32) {

    if (Src0->isImm() && Src0->getImm() == 0) {

      // v_lshl_or_b32 0, X, Y -> copy Y

      // v_lshl_or_b32 0, X, K -> v_mov_b32 K

      // v_lshl_add_b32 0, X, Y -> copy Y

      // v_lshl_add_b32 0, X, K -> v_mov_b32 K

      // v_and_or_b32 0, X, Y -> copy Y

      // v_and_or_b32 0, X, K -> v_mov_b32 K

      bool UseCopy = TII->getNamedOperand(*MI, AMDGPU::OpName::src2)->isReg();

      MI->RemoveOperand(Src1Idx);

      MI->RemoveOperand(Src0Idx);

llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir

+487 −93
Original line number Diff line number Diff line
@@ -130,98 +130,6 @@ body: | 
    BUFFER_STORE_DWORD_OFFSET killed %13, killed %10, 0, 0, 0, 0, 0, 0, 0, implicit $exec

    S_ENDPGM 0



...

---

# GCN-LABEL: name: v_fold_shl_imm_regimm_32{{$}}



# GCN: [[VAL0:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 40955904, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL0]],



# GCN: [[VAL1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL1]],



# GCN: [[VAL2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL2]],



# GCN: [[VAL3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL3]],



# GCN: [[VAL4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL4]],



# GCN: [[VAL5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL5]],



# GCN: [[VAL6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL6]],



# GCN: [[VAL7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL7]],



# GCN: [[VAL8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7927808, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL8]],



# GCN: [[VAL9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec

# GCN: FLAT_STORE_DWORD %10, [[VAL9]],



name:            v_fold_shl_imm_regimm_32

tracksRegLiveness: true

liveins:

  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }

  - { reg: '$vgpr0', virtual-reg: '%2' }

body:             |

  bb.0:

    liveins: $sgpr0_sgpr1, $vgpr0



    %2:vgpr_32 = COPY $vgpr0

    %0:sgpr_64 = COPY $sgpr0_sgpr1

    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(4)* undef`, addrspace 4)

    %15:vgpr_32 = V_ASHRREV_I32_e64 31, %2, implicit $exec

    %16:vreg_64 = REG_SEQUENCE %2, %subreg.hi16, %15, %subreg.lo16

    %17:vreg_64 = V_LSHLREV_B64 2, killed %16, implicit $exec

    %9:sreg_32_xm0 = COPY %3.sub1

    %21:vgpr_32 = V_ADD_I32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec

    %19:vgpr_32 = COPY killed %9

    %18:vgpr_32 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec

    %20:vreg_64 = REG_SEQUENCE %21, %subreg.hi16, killed %18, %subreg.lo16

    %10:vgpr_32 = V_MOV_B32_e32 9999, implicit $exec

    %24:vgpr_32 = V_MOV_B32_e32 3871, implicit $exec

    %6:vgpr_32 = V_MOV_B32_e32 1, implicit $exec

    %7:sreg_32_xm0 = S_MOV_B32 1

    %27:sreg_32_xm0 = S_MOV_B32 -4



    %11:vgpr_32 = V_LSHLREV_B32_e64 12, %10, implicit $exec

    FLAT_STORE_DWORD %20, %11, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    %12:vgpr_32 = V_LSHLREV_B32_e64 %7, 12, implicit $exec

    FLAT_STORE_DWORD %20, %12, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    %13:vgpr_32 = V_LSHL_B32_e64 %7, 12, implicit $exec

    FLAT_STORE_DWORD %20, %13, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    %14:vgpr_32 = V_LSHL_B32_e64 12, %7, implicit $exec

    FLAT_STORE_DWORD %20, %14, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    %15:vgpr_32 = V_LSHL_B32_e64 12, %24, implicit $exec

    FLAT_STORE_DWORD %20, %15, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    %22:vgpr_32 = V_LSHL_B32_e64 %6, 12, implicit $exec

    FLAT_STORE_DWORD %20, %22, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    %23:vgpr_32 = V_LSHL_B32_e64 %6, 32, implicit $exec

    FLAT_STORE_DWORD %20, %23, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    %25:vgpr_32 = V_LSHL_B32_e32 %6, %6, implicit $exec

    FLAT_STORE_DWORD %20, %25, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    %26:vgpr_32 = V_LSHLREV_B32_e32 11, %24, implicit $exec

    FLAT_STORE_DWORD %20, %26, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    %28:vgpr_32 = V_LSHL_B32_e32 %27, %6, implicit $exec

    FLAT_STORE_DWORD %20, %28, 0, 0, 0, 0, implicit $exec, implicit $flat_scr



    S_ENDPGM 0



...

---
@@ -571,3 +479,489 @@ body: | 
  S_ENDPGM 0, implicit %3



...



---

# GCN-LABEL: name: s_fold_andn2_imm_regimm_32{{$}}

# GCN: [[VAL:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1233024, implicit $exec

# GCN: BUFFER_STORE_DWORD_OFFSET killed [[VAL]],

name:            s_fold_andn2_imm_regimm_32

tracksRegLiveness: true

liveins:

  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }

body:             |

  bb.0:

    liveins: $sgpr0_sgpr1



    %0:sgpr_64 = COPY $sgpr0_sgpr1

    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0

    %2:sreg_32_xm0 = COPY %1.sub1

    %3:sreg_32_xm0 = COPY %1.sub0

    %4:sreg_32_xm0 = S_MOV_B32 61440

    %5:sreg_32_xm0 = S_MOV_B32 -1

    %6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3

    %7:sreg_32_xm0 = S_MOV_B32 1234567

    %8:sreg_32_xm0 = S_MOV_B32 9999

    %9:sreg_32_xm0 = S_ANDN2_B32 killed %7, killed %8, implicit-def dead $scc

    %10:vgpr_32 = COPY %9

    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec

    S_ENDPGM 0



...

---



# GCN-LABEL: name: s_fold_or_imm_regimm_32{{$}}

# GCN: %10:vgpr_32 = V_MOV_B32_e32 1243023, implicit $exec

# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,

name:            s_fold_or_imm_regimm_32

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true

liveins:

  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }

body:             |

  bb.0:

    liveins: $sgpr0_sgpr1



    %0:sgpr_64 = COPY $sgpr0_sgpr1

    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0

    %2:sreg_32_xm0 = COPY %1.sub1

    %3:sreg_32_xm0 = COPY %1.sub0

    %4:sreg_32_xm0 = S_MOV_B32 61440

    %5:sreg_32_xm0 = S_MOV_B32 -1

    %6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3

    %7:sreg_32_xm0 = S_MOV_B32 1234567

    %8:sreg_32_xm0 = S_MOV_B32 9999

    %9:sreg_32_xm0 = S_OR_B32 killed %7, killed %8, implicit-def dead $scc

    %10:vgpr_32 = COPY %9

    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec

    S_ENDPGM 0



...

---



# GCN-LABEL: name: v_fold_or_imm_regimm_32{{$}}



# GCN: %14:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %14,



# GCN: %15:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %15



# GCN: %16:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %16,



# GCN: %17:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %17,



# GCN: %3:vgpr_32 = V_MOV_B32_e32 63, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %3,



name:            v_fold_or_imm_regimm_32

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true

liveins:

  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }

  - { reg: '$vgpr0', virtual-reg: '%3' }

body:             |

  bb.0:

    liveins: $sgpr0_sgpr1, $vgpr0



    %3:vgpr_32 = COPY $vgpr0

    %0:sgpr_64 = COPY $sgpr0_sgpr1

    %4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0

    %13:vgpr_32 = V_ASHRREV_I32_e64 31, %3, implicit $exec

    %14:vreg_64 = REG_SEQUENCE %3, %subreg.sub0, %13, %subreg.sub1

    %15:vreg_64 = V_LSHLREV_B64 2, killed %14, implicit $exec

    %5:sreg_32_xm0 = COPY %4.sub1

    %20:vgpr_32 = V_ADD_I32_e32 %4.sub0, %15.sub0, implicit-def $vcc, implicit $exec

    %18:vgpr_32 = COPY killed %5

    %17:vgpr_32 = V_ADDC_U32_e32 %15.sub1, %18, implicit-def $vcc, implicit $vcc, implicit $exec

    %19:vreg_64 = REG_SEQUENCE %20, %subreg.sub0, killed %17, %subreg.sub1

    %6:vgpr_32 = V_MOV_B32_e32 982, implicit $exec

    %8:sreg_32_xm0 = S_MOV_B32 1234567

    %16:vgpr_32 = V_MOV_B32_e32 63, implicit $exec

    %9:vgpr_32 = V_OR_B32_e64 %8, %6, implicit $exec

    FLAT_STORE_DWORD %19, %9, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %10:vgpr_32 = V_OR_B32_e64 %6, %8, implicit $exec

    FLAT_STORE_DWORD %19, %10, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %11:vgpr_32 = V_OR_B32_e32 %8, %6, implicit $exec

    FLAT_STORE_DWORD %19, %11, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %12:vgpr_32 = V_OR_B32_e64 %8, %8, implicit $exec

    FLAT_STORE_DWORD %19, %12, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %13:vgpr_32 = V_OR_B32_e64 %16, %16, implicit $exec

    FLAT_STORE_DWORD %19, %13, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    S_ENDPGM 0



...

---



# GCN-LABEL: name: s_fold_orn2_imm_regimm_32{{$}}

# GCN: %10:vgpr_32 = V_MOV_B32_e32 -8457, implicit $exec

# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,

name:            s_fold_orn2_imm_regimm_32

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true

liveins:

  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }

body:             |

  bb.0:

    liveins: $sgpr0_sgpr1



    %0:sgpr_64 = COPY $sgpr0_sgpr1

    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0

    %2:sreg_32_xm0 = COPY %1.sub1

    %3:sreg_32_xm0 = COPY %1.sub0

    %4:sreg_32_xm0 = S_MOV_B32 61440

    %5:sreg_32_xm0 = S_MOV_B32 -1

    %6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3

    %7:sreg_32_xm0 = S_MOV_B32 1234567

    %8:sreg_32_xm0 = S_MOV_B32 9999

    %9:sreg_32_xm0 = S_ORN2_B32 killed %7, killed %8, implicit-def dead $scc

    %10:vgpr_32 = COPY %9

    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec

    S_ENDPGM 0



...

---



# GCN-LABEL: name: s_fold_nand_imm_regimm_32{{$}}

# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1544, implicit $exec

# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,

name:            s_fold_nand_imm_regimm_32

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true

liveins:

  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }

body:             |

  bb.0:

    liveins: $sgpr0_sgpr1



    %0:sgpr_64 = COPY $sgpr0_sgpr1

    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0

    %2:sreg_32_xm0 = COPY %1.sub1

    %3:sreg_32_xm0 = COPY %1.sub0

    %4:sreg_32_xm0 = S_MOV_B32 61440

    %5:sreg_32_xm0 = S_MOV_B32 -1

    %6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3

    %7:sreg_32_xm0 = S_MOV_B32 1234567

    %8:sreg_32_xm0 = S_MOV_B32 9999

    %9:sreg_32_xm0 = S_NAND_B32 killed %7, killed %8, implicit-def dead $scc

    %10:vgpr_32 = COPY %9

    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec

    S_ENDPGM 0



...

---



# GCN-LABEL: name: s_fold_nor_imm_regimm_32{{$}}

# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1243024, implicit $exec

# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,

name:            s_fold_nor_imm_regimm_32

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true

liveins:

  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }

body:             |

  bb.0:

    liveins: $sgpr0_sgpr1



    %0:sgpr_64 = COPY $sgpr0_sgpr1

    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0

    %2:sreg_32_xm0 = COPY %1.sub1

    %3:sreg_32_xm0 = COPY %1.sub0

    %4:sreg_32_xm0 = S_MOV_B32 61440

    %5:sreg_32_xm0 = S_MOV_B32 -1

    %6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3

    %7:sreg_32_xm0 = S_MOV_B32 1234567

    %8:sreg_32_xm0 = S_MOV_B32 9999

    %9:sreg_32_xm0 = S_NOR_B32 killed %7, killed %8, implicit-def dead $scc

    %10:vgpr_32 = COPY %9

    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec

    S_ENDPGM 0



...

---



# GCN-LABEL: name: s_fold_xnor_imm_regimm_32{{$}}

# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1241481, implicit $exec

# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,

name:            s_fold_xnor_imm_regimm_32

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true

liveins:

  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }

body:             |

  bb.0:

    liveins: $sgpr0_sgpr1



    %0:sgpr_64 = COPY $sgpr0_sgpr1

    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0

    %2:sreg_32_xm0 = COPY %1.sub1

    %3:sreg_32_xm0 = COPY %1.sub0

    %4:sreg_32_xm0 = S_MOV_B32 61440

    %5:sreg_32_xm0 = S_MOV_B32 -1

    %6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3

    %7:sreg_32_xm0 = S_MOV_B32 1234567

    %8:sreg_32_xm0 = S_MOV_B32 9999

    %9:sreg_32_xm0 = S_XNOR_B32 killed %7, killed %8, implicit-def dead $scc

    %10:vgpr_32 = COPY %9

    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec

    S_ENDPGM 0



...



---

# GCN-LABEL: name: v_fold_shl_imm_regimm_32{{$}}



# GCN: %16:vgpr_32 = V_MOV_B32_e32 40955904, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %16,



# GCN: %17:vgpr_32 = V_MOV_B32_e32 24, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %17,



# GCN: %18:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %18,



# GCN: %19:vgpr_32 = V_MOV_B32_e32 24, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %19,



# GCN: %3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %3,



# GCN: %20:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %20,



# GCN: %21:vgpr_32 = V_MOV_B32_e32 1, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %21,



# GCN: %22:vgpr_32 = V_MOV_B32_e32 2, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %22,



# GCN: %23:vgpr_32 = V_MOV_B32_e32 7927808, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %23,



# GCN: %24:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec

# GCN: FLAT_STORE_DWORD %10, %24,



name:            v_fold_shl_imm_regimm_32

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true

liveins:

  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }

  - { reg: '$vgpr0', virtual-reg: '%2' }

body:             |

  bb.0:

    liveins: $sgpr0_sgpr1, $vgpr0



    %2:vgpr_32 = COPY $vgpr0

    %0:sgpr_64 = COPY $sgpr0_sgpr1

    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(4)* undef`, addrspace 4)

    %15:vgpr_32 = V_ASHRREV_I32_e64 31, %2, implicit $exec

    %16:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %15, %subreg.sub1

    %17:vreg_64 = V_LSHLREV_B64 2, killed %16, implicit $exec

    %9:sreg_32_xm0 = COPY %3.sub1

    %21:vgpr_32 = V_ADD_I32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec

    %19:vgpr_32 = COPY killed %9

    %18:vgpr_32 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec

    %20:vreg_64 = REG_SEQUENCE %21, %subreg.sub0, killed %18, %subreg.sub1

    %10:vgpr_32 = V_MOV_B32_e32 9999, implicit $exec

    %24:vgpr_32 = V_MOV_B32_e32 3871, implicit $exec

    %6:vgpr_32 = V_MOV_B32_e32 1, implicit $exec

    %7:sreg_32_xm0 = S_MOV_B32 1

    %27:sreg_32_xm0 = S_MOV_B32 -4

    %11:vgpr_32 = V_LSHLREV_B32_e64 12, %10, implicit $exec

    FLAT_STORE_DWORD %20, %11, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %12:vgpr_32 = V_LSHLREV_B32_e64 %7, 12, implicit $exec

    FLAT_STORE_DWORD %20, %12, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %13:vgpr_32 = V_LSHL_B32_e64 %7, 12, implicit $exec

    FLAT_STORE_DWORD %20, %13, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %14:vgpr_32 = V_LSHL_B32_e64 12, %7, implicit $exec

    FLAT_STORE_DWORD %20, %14, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %15:vgpr_32 = V_LSHL_B32_e64 12, %24, implicit $exec

    FLAT_STORE_DWORD %20, %15, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %22:vgpr_32 = V_LSHL_B32_e64 %6, 12, implicit $exec

    FLAT_STORE_DWORD %20, %22, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %23:vgpr_32 = V_LSHL_B32_e64 %6, 32, implicit $exec

    FLAT_STORE_DWORD %20, %23, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %25:vgpr_32 = V_LSHL_B32_e32 %6, %6, implicit $exec

    FLAT_STORE_DWORD %20, %25, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %26:vgpr_32 = V_LSHLREV_B32_e32 11, %24, implicit $exec

    FLAT_STORE_DWORD %20, %26, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    %28:vgpr_32 = V_LSHL_B32_e32 %27, %6, implicit $exec

    FLAT_STORE_DWORD %20, %28, 0, 0, 0, 0, implicit $exec, implicit $flat_scr

    S_ENDPGM 0



...



---

# GCN-LABEL: name: constant_fold_lshl_add_reg0_immreg_reg{{$}}

# GCN: %2:vgpr_32 = COPY $vgpr0, implicit $exec

# GCN-NEXT: S_ENDPGM



name:            constant_fold_lshl_add_reg0_immreg_reg

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true



body:             |

  bb.0:

    liveins: $vgpr0



    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec

    %2:vgpr_32 = V_LSHL_ADD_U32 %0, %1, $vgpr0, implicit $exec

    S_ENDPGM 0, implicit %2



...



---



# GCN-LABEL: name: constant_fold_lshl_add_reg0_immreg_imm{{$}}

# GCN: %2:vgpr_32 = V_MOV_B32_e32 10, implicit $exec

# GCN-NEXT: S_ENDPGM



name:            constant_fold_lshl_add_reg0_immreg_imm

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true



body:             |

  bb.0:



    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec

    %2:vgpr_32 = V_LSHL_ADD_U32 %0, %1, 10, implicit $exec

    S_ENDPGM 0, implicit %2



...



---



# GCN-LABEL: name: constant_fold_lshl_add_reg0_immreg_immreg{{$}}

# GCN: %3:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec

# GCN-NEXT: S_ENDPGM



name:            constant_fold_lshl_add_reg0_immreg_immreg

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true



body:             |

  bb.0:



    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec

    %2:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec

    %3:vgpr_32 = V_LSHL_ADD_U32 %0, %1, %2, implicit $exec

    S_ENDPGM 0, implicit %3



...



---

# GCN-LABEL: name: constant_fold_and_or_reg0_immreg_reg{{$}}

# GCN: %2:vgpr_32 = COPY $vgpr0, implicit $exec

# GCN-NEXT: S_ENDPGM



name:            constant_fold_and_or_reg0_immreg_reg

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true



body:             |

  bb.0:

    liveins: $vgpr0



    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec

    %2:vgpr_32 = V_AND_OR_B32 %0, %1, $vgpr0, implicit $exec

    S_ENDPGM 0, implicit %2



...



---



# GCN-LABEL: name: constant_fold_and_or_reg0_immreg_imm{{$}}

# GCN: %2:vgpr_32 = V_MOV_B32_e32 10, implicit $exec

# GCN-NEXT: S_ENDPGM



name:            constant_fold_and_or_reg0_immreg_imm

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true



body:             |

  bb.0:



    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec

    %2:vgpr_32 = V_AND_OR_B32 %0, %1, 10, implicit $exec

    S_ENDPGM 0, implicit %2



...



---



# GCN-LABEL: name: constant_fold_and_or_reg0_immreg_immreg{{$}}

# GCN: %3:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec

# GCN-NEXT: S_ENDPGM



name:            constant_fold_and_or_reg0_immreg_immreg

alignment:       0

exposesReturnsTwice: false

legalized:       false

regBankSelected: false

selected:        false

tracksRegLiveness: true



body:             |

  bb.0:



    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec

    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec

    %2:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec

    %3:vgpr_32 = V_AND_OR_B32 %0, %1, %2, implicit $exec

    S_ENDPGM 0, implicit %3



...