Commit a0e728bc authored by Renato Golin's avatar Renato Golin
Browse files

Merge r245577 into branch_37 

[ARM] Don't try and custom lower a vNi64 SETCC.

It won't go well. We've already marked 64-bit SETCCs as non-Custom, but it's
just possible that a SETCC has a legal result type but an illegal operand
type. If this happens, bail out before we create unselectable nodes.

Fixes PR24292. I tried to create a testcase but in 99% of cases we can't
trigger this - not surprising that this bug has been latent since 2009.

llvm-svn: 245578
parent 8b1fc860

llvm/lib/Target/ARM/ARMISelLowering.cpp

+6 −0
Original line number Diff line number Diff line
@@ -4583,6 +4583,12 @@ static SDValue LowerVSETCC(SDValue Op, SelectionDAG &DAG) { 
  ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();

  SDLoc dl(Op);



  if (CmpVT.getVectorElementType() == MVT::i64)

    // 64-bit comparisons are not legal. We've marked SETCC as non-Custom,

    // but it's possible that our operands are 64-bit but our result is 32-bit.

    // Bail in this case.

    return SDValue();



  if (Op1.getValueType().isFloatingPoint()) {

    switch (SetCCOpcode) {

    default: llvm_unreachable("Illegal FP comparison");