Commit a0a49351 authored by Arthur Eubanks's avatar Arthur Eubanks
Browse files

Make more places that use alignment use uint64_t 

Followup to D110451.
parent b80f2dfd

llvm/include/llvm/CodeGen/TargetLowering.h

+1 −1
Original line number Diff line number Diff line
@@ -1454,7 +1454,7 @@ public: 
  /// Return the desired alignment for ByVal or InAlloca aggregate function

  /// arguments in the caller parameter area.  This is the actual alignment, not

  /// its logarithm.

  virtual unsigned getByValTypeAlignment(Type *Ty, const DataLayout &DL) const;

  virtual uint64_t getByValTypeAlignment(Type *Ty, const DataLayout &DL) const;



  /// Return the type of registers that this ValueType will eventually require.

  MVT getRegisterType(MVT VT) const {

llvm/lib/CodeGen/TargetLoweringBase.cpp

+1 −1
Original line number Diff line number Diff line
@@ -1695,7 +1695,7 @@ void llvm::GetReturnInfo(CallingConv::ID CC, Type *ReturnType, 
/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate

/// function arguments in the caller parameter area.  This is the actual

/// alignment, not its logarithm.

unsigned TargetLoweringBase::getByValTypeAlignment(Type *Ty,

uint64_t TargetLoweringBase::getByValTypeAlignment(Type *Ty,

                                                   const DataLayout &DL) const {

  return DL.getABITypeAlign(Ty).value();

}

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

+1 −1
Original line number Diff line number Diff line
@@ -1555,7 +1555,7 @@ static void getMaxByValAlign(Type *Ty, Align &MaxAlign, Align MaxMaxAlign) { 














/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate















/// function arguments in the caller parameter area.













unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty,













uint64_t PPCTargetLowering::getByValTypeAlignment(Type *Ty,















                                                  const DataLayout &DL) const {















  // 16byte and wider vectors are passed on 16byte boundary.















  // The rest is 8 on PPC64 and 4 on PPC32 boundary.

































llvm/lib/Target/PowerPC/PPCISelLowering.h



+1
−1






























Original line number
Diff line number
Diff line








@@ -943,7 +943,7 @@ namespace llvm {













    /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate















    /// function arguments in the caller parameter area.  This is the actual















    /// alignment, not its logarithm.













    unsigned getByValTypeAlignment(Type *Ty,













    uint64_t getByValTypeAlignment(Type *Ty,















                                   const DataLayout &DL) const override;































    /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops

































llvm/lib/Target/X86/X86ISelLowering.cpp



+1
−1






























Original line number
Diff line number
Diff line








@@ -2476,7 +2476,7 @@ static void getMaxByValAlign(Type *Ty, Align &MaxAlign) {













/// function arguments in the caller parameter area. For X86, aggregates















/// that contain SSE vectors are placed at 16-byte boundaries while the rest















/// are at 4-byte boundaries.













unsigned X86TargetLowering::getByValTypeAlignment(Type *Ty,













uint64_t X86TargetLowering::getByValTypeAlignment(Type *Ty,















                                                  const DataLayout &DL) const {















  if (Subtarget.is64Bit()) {















    // Max of 8 and alignment of type.