Commit 9e856fab authored by Tom Stellard's avatar Tom Stellard
Browse files

Merging r348461:

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r348461 | lebedevri | 2018-12-06 00:11:20 -0800 (Thu, 06 Dec 2018) | 4 lines

[NFC][InstCombine] Add more miscompile tests for foldICmpWithLowBitMaskedVal()

We also have to me aware of vector constants. If at least one element
is -1, we can't transform.
------------------------------------------------------------------------

llvm-svn: 348535
parent 2ea572a8
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+37 −13
Original line number Diff line number Diff line
@@ -23,19 +23,6 @@ define i1 @p0(i8 %x) {
  ret i1 %ret
}

define i1 @pv(i8 %x, i8 %y) {
; CHECK-LABEL: @pv(
; CHECK-NEXT:    [[TMP0:%.*]] = lshr i8 -1, [[Y:%.*]]
; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[TMP0]], [[X:%.*]]
; CHECK-NEXT:    [[RET:%.*]] = icmp sge i8 [[TMP1]], [[X]]
; CHECK-NEXT:    ret i1 [[RET]]
;
  %tmp0 = lshr i8 -1, %y
  %tmp1 = and i8 %tmp0, %x
  %ret = icmp sge i8 %tmp1, %x
  ret i1 %ret
}

; ============================================================================ ;
; Vector tests
; ============================================================================ ;
@@ -198,3 +185,40 @@ define <2 x i1> @n2(<2 x i8> %x) {
  %ret = icmp sge <2 x i8> %tmp0, %x
  ret <2 x i1> %ret
}

; ============================================================================ ;
; Potential miscompiles.
; ============================================================================ ;

define i1 @nv(i8 %x, i8 %y) {
; CHECK-LABEL: @nv(
; CHECK-NEXT:    [[TMP0:%.*]] = lshr i8 -1, [[Y:%.*]]
; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[TMP0]], [[X:%.*]]
; CHECK-NEXT:    [[RET:%.*]] = icmp sge i8 [[TMP1]], [[X]]
; CHECK-NEXT:    ret i1 [[RET]]
;
  %tmp0 = lshr i8 -1, %y
  %tmp1 = and i8 %tmp0, %x
  %ret = icmp sge i8 %tmp1, %x
  ret i1 %ret
}

define <2 x i1> @n3_vec(<2 x i8> %x) {
; CHECK-LABEL: @n3_vec(
; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt <2 x i8> [[X:%.*]], <i8 4, i8 0>
; CHECK-NEXT:    ret <2 x i1> [[TMP1]]
;
  %tmp0 = and <2 x i8> %x, <i8 3, i8 -1>
  %ret = icmp sge <2 x i8> %tmp0, %x
  ret <2 x i1> %ret
}

define <3 x i1> @n4_vec(<3 x i8> %x) {
; CHECK-LABEL: @n4_vec(
; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt <3 x i8> [[X:%.*]], <i8 4, i8 undef, i8 0>
; CHECK-NEXT:    ret <3 x i1> [[TMP1]]
;
  %tmp0 = and <3 x i8> %x, <i8 3, i8 undef, i8 -1>
  %ret = icmp sge <3 x i8> %tmp0, %x
  ret <3 x i1> %ret
}
+37 −13
Original line number Diff line number Diff line
@@ -23,19 +23,6 @@ define i1 @p0(i8 %x) {
  ret i1 %ret
}

define i1 @pv(i8 %x, i8 %y) {
; CHECK-LABEL: @pv(
; CHECK-NEXT:    [[TMP0:%.*]] = lshr i8 -1, [[Y:%.*]]
; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[TMP0]], [[X:%.*]]
; CHECK-NEXT:    [[RET:%.*]] = icmp slt i8 [[TMP1]], [[X]]
; CHECK-NEXT:    ret i1 [[RET]]
;
  %tmp0 = lshr i8 -1, %y
  %tmp1 = and i8 %tmp0, %x
  %ret = icmp slt i8 %tmp1, %x
  ret i1 %ret
}

; ============================================================================ ;
; Vector tests
; ============================================================================ ;
@@ -198,3 +185,40 @@ define <2 x i1> @n2(<2 x i8> %x) {
  %ret = icmp slt <2 x i8> %tmp0, %x
  ret <2 x i1> %ret
}

; ============================================================================ ;
; Potential miscompiles.
; ============================================================================ ;

define i1 @nv(i8 %x, i8 %y) {
; CHECK-LABEL: @nv(
; CHECK-NEXT:    [[TMP0:%.*]] = lshr i8 -1, [[Y:%.*]]
; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[TMP0]], [[X:%.*]]
; CHECK-NEXT:    [[RET:%.*]] = icmp slt i8 [[TMP1]], [[X]]
; CHECK-NEXT:    ret i1 [[RET]]
;
  %tmp0 = lshr i8 -1, %y
  %tmp1 = and i8 %tmp0, %x
  %ret = icmp slt i8 %tmp1, %x
  ret i1 %ret
}

define <2 x i1> @n3(<2 x i8> %x) {
; CHECK-LABEL: @n3(
; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt <2 x i8> [[X:%.*]], <i8 3, i8 -1>
; CHECK-NEXT:    ret <2 x i1> [[TMP1]]
;
  %tmp0 = and <2 x i8> %x, <i8 3, i8 -1>
  %ret = icmp slt <2 x i8> %tmp0, %x
  ret <2 x i1> %ret
}

define <3 x i1> @n4(<3 x i8> %x) {
; CHECK-LABEL: @n4(
; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt <3 x i8> [[X:%.*]], <i8 3, i8 undef, i8 -1>
; CHECK-NEXT:    ret <3 x i1> [[TMP1]]
;
  %tmp0 = and <3 x i8> %x, <i8 3, i8 undef, i8 -1>
  %ret = icmp slt <3 x i8> %tmp0, %x
  ret <3 x i1> %ret
}