Commit 97fa7e0e authored by Bill Wendling's avatar Bill Wendling
Browse files

Merging r142801: 

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r142801 | grosbach | 2011-10-24 10:16:24 -0700 (Mon, 24 Oct 2011) | 4 lines

Thumb2 LDM instructions can target PC. Make sure to encode it.

PR11220

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llvm-svn: 142808
parent 9eb29f15

llvm/lib/Target/ARM/ARMInstrThumb2.td

+4 −8
Original line number Diff line number Diff line
@@ -1538,8 +1538,7 @@ multiclass thumb2_ld_mult<string asm, InstrItinClass itin, 
    let Inst{21}    = 0;        // No writeback

    let Inst{20}    = L_bit;

    let Inst{19-16} = Rn;

    let Inst{15}    = 0;

    let Inst{14-0}  = regs{14-0};

    let Inst{15-0}  = regs;

  }

  def IA_UPD :

    T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
@@ -1554,8 +1553,7 @@ multiclass thumb2_ld_mult<string asm, InstrItinClass itin, 
    let Inst{21}    = 1;        // Writeback

    let Inst{20}    = L_bit;

    let Inst{19-16} = Rn;

    let Inst{15}    = 0;

    let Inst{14-0}  = regs{14-0};

    let Inst{15-0}  = regs;

  }

  def DB :

    T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
@@ -1570,8 +1568,7 @@ multiclass thumb2_ld_mult<string asm, InstrItinClass itin, 
    let Inst{21}    = 0;        // No writeback

    let Inst{20}    = L_bit;

    let Inst{19-16} = Rn;

    let Inst{15}    = 0;

    let Inst{14-0}  = regs{14-0};

    let Inst{15-0}  = regs;

  }

  def DB_UPD :

    T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
@@ -1586,8 +1583,7 @@ multiclass thumb2_ld_mult<string asm, InstrItinClass itin, 
    let Inst{21}    = 1;        // Writeback

    let Inst{20}    = L_bit;

    let Inst{19-16} = Rn;

    let Inst{15}    = 0;

    let Inst{14-0}  = regs{14-0};

    let Inst{15-0}  = regs;

  }

}