Loading llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +10 −15 Original line number Diff line number Diff line Loading @@ -137,8 +137,8 @@ public: return "Linux PPC Assembly Printer"; } bool doFinalization(Module &M) override; void emitStartOfAsmFile(Module &M) override; void emitEndOfAsmFile(Module &) override; void emitFunctionEntryLabel() override; Loading Loading @@ -1396,7 +1396,7 @@ void PPCLinuxAsmPrinter::emitFunctionEntryLabel() { OutStreamer->SwitchSection(Current.first, Current.second); } bool PPCLinuxAsmPrinter::doFinalization(Module &M) { void PPCLinuxAsmPrinter::emitEndOfAsmFile(Module &M) { const DataLayout &DL = getDataLayout(); bool isPPC64 = DL.getPointerSizeInBits() == 64; Loading @@ -1405,31 +1405,26 @@ bool PPCLinuxAsmPrinter::doFinalization(Module &M) { static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); if (!TOC.empty()) { MCSectionELF *Section; if (isPPC64) Section = OutStreamer->getContext().getELFSection( ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); else Section = OutStreamer->getContext().getELFSection( ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); const char *Name = isPPC64 ? ".toc" : ".got2"; MCSectionELF *Section = OutContext.getELFSection( Name, ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); OutStreamer->SwitchSection(Section); if (!isPPC64) OutStreamer->emitValueToAlignment(4); for (const auto &TOCMapPair : TOC) { const MCSymbol *const TOCEntryTarget = TOCMapPair.first; MCSymbol *const TOCEntryLabel = TOCMapPair.second; OutStreamer->emitLabel(TOCEntryLabel); if (isPPC64) { if (isPPC64) TS.emitTCEntry(*TOCEntryTarget); } else { OutStreamer->emitValueToAlignment(4); else OutStreamer->emitSymbolValue(TOCEntryTarget, 4); } } } return AsmPrinter::doFinalization(M); PPCAsmPrinter::emitEndOfAsmFile(M); } /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. Loading llvm/test/CodeGen/PowerPC/mcm-2.ll +5 −4 Original line number Diff line number Diff line Loading @@ -30,8 +30,9 @@ entry: ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) ; LARGE: lwz {{[0-9]+}}, 0([[REG2]]) ; LARGE: stw {{[0-9]+}}, 0([[REG2]]) ; LARGE: [[VAR]]: ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]] ; LARGE: .type [[VAR2]],@object ; LARGE: .lcomm [[VAR2]],4,4 ; LARGE: .type test_fn_static.si,@object ; LARGE-NEXT: .lcomm test_fn_static.si,4,4 ; LARGE: .section .toc,"aw",@progbits ; LARGE-NEXT: [[VAR]]: ; LARGE-NEXT: .tc test_fn_static.si[TC],test_fn_static.si llvm/test/CodeGen/PowerPC/mcm-3.ll +9 −7 Original line number Diff line number Diff line Loading @@ -33,11 +33,13 @@ entry: ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) ; LARGE: lwz {{[0-9]+}}, 0([[REG2]]) ; LARGE: stw {{[0-9]+}}, 0([[REG2]]) ; LARGE: [[VAR]]: ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]] ; LARGE: .type [[VAR2]],@object ; LARGE: .data ; LARGE: .globl [[VAR2]] ; LARGE: [[VAR2]]: ; LARGE: .long 5 ; LARGE: .type gi,@object ; LARGE-NEXT: .data ; LARGE-NEXT: .globl gi ; LARGE-NEXT: .p2align 2 ; LARGE-NEXT: gi: ; LARGE-NEXT: .long 5 ; LARGE: .section .toc,"aw",@progbits ; LARGE-NEXT: [[VAR]]: ; LARGE-NEXT: .tc gi[TC],gi llvm/test/CodeGen/PowerPC/mcm-6.ll +4 −4 Original line number Diff line number Diff line Loading @@ -22,7 +22,7 @@ entry: ; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]]) ; CHECK: lwz {{[0-9]+}}, 0([[REG2]]) ; CHECK: stw {{[0-9]+}}, 0([[REG2]]) ; CHECK: .section .toc ; CHECK: .LC[[TOCNUM]]: ; CHECK: .tc [[VAR:[a-z0-9A-Z_.]+]][TC],{{[a-z0-9A-Z_.]+}} ; CHECK: .comm [[VAR]],4,4 ; CHECK: .comm ti,4,4 ; CHECK: .section .toc,"aw",@progbits ; CHECK-NEXT: .LC[[TOCNUM]]: ; CHECK-NEXT: .tc ti[TC],ti llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll +3 −2 Original line number Diff line number Diff line Loading @@ -33,8 +33,9 @@ entry: ; LARGE-BSS-DAG: lwz {{[0-9]+}}, 0([[VREG]]) ; LARGE-BSS-DAG: stw {{[0-9]+}}, 8(1) ; LARGE-BSS: lwz 30, 24(1) ; LARGE-BSS: [[VREF]]: ; LARGE-BSS: .section .got2,"aw",@progbits ; LARGE-BSS-NEXT: .p2align 2 ; LARGE-BSS-NEXT: [[VREF]]: ; LARGE-BSS-NEXT: .long bar ; LARGE-SECUREPLT: addis 30, 30, .LTOC-.L0$pb@ha ; LARGE-SECUREPLT: addi 30, 30, .LTOC-.L0$pb@l Loading Loading
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +10 −15 Original line number Diff line number Diff line Loading @@ -137,8 +137,8 @@ public: return "Linux PPC Assembly Printer"; } bool doFinalization(Module &M) override; void emitStartOfAsmFile(Module &M) override; void emitEndOfAsmFile(Module &) override; void emitFunctionEntryLabel() override; Loading Loading @@ -1396,7 +1396,7 @@ void PPCLinuxAsmPrinter::emitFunctionEntryLabel() { OutStreamer->SwitchSection(Current.first, Current.second); } bool PPCLinuxAsmPrinter::doFinalization(Module &M) { void PPCLinuxAsmPrinter::emitEndOfAsmFile(Module &M) { const DataLayout &DL = getDataLayout(); bool isPPC64 = DL.getPointerSizeInBits() == 64; Loading @@ -1405,31 +1405,26 @@ bool PPCLinuxAsmPrinter::doFinalization(Module &M) { static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); if (!TOC.empty()) { MCSectionELF *Section; if (isPPC64) Section = OutStreamer->getContext().getELFSection( ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); else Section = OutStreamer->getContext().getELFSection( ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); const char *Name = isPPC64 ? ".toc" : ".got2"; MCSectionELF *Section = OutContext.getELFSection( Name, ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); OutStreamer->SwitchSection(Section); if (!isPPC64) OutStreamer->emitValueToAlignment(4); for (const auto &TOCMapPair : TOC) { const MCSymbol *const TOCEntryTarget = TOCMapPair.first; MCSymbol *const TOCEntryLabel = TOCMapPair.second; OutStreamer->emitLabel(TOCEntryLabel); if (isPPC64) { if (isPPC64) TS.emitTCEntry(*TOCEntryTarget); } else { OutStreamer->emitValueToAlignment(4); else OutStreamer->emitSymbolValue(TOCEntryTarget, 4); } } } return AsmPrinter::doFinalization(M); PPCAsmPrinter::emitEndOfAsmFile(M); } /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. Loading
llvm/test/CodeGen/PowerPC/mcm-2.ll +5 −4 Original line number Diff line number Diff line Loading @@ -30,8 +30,9 @@ entry: ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) ; LARGE: lwz {{[0-9]+}}, 0([[REG2]]) ; LARGE: stw {{[0-9]+}}, 0([[REG2]]) ; LARGE: [[VAR]]: ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]] ; LARGE: .type [[VAR2]],@object ; LARGE: .lcomm [[VAR2]],4,4 ; LARGE: .type test_fn_static.si,@object ; LARGE-NEXT: .lcomm test_fn_static.si,4,4 ; LARGE: .section .toc,"aw",@progbits ; LARGE-NEXT: [[VAR]]: ; LARGE-NEXT: .tc test_fn_static.si[TC],test_fn_static.si
llvm/test/CodeGen/PowerPC/mcm-3.ll +9 −7 Original line number Diff line number Diff line Loading @@ -33,11 +33,13 @@ entry: ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) ; LARGE: lwz {{[0-9]+}}, 0([[REG2]]) ; LARGE: stw {{[0-9]+}}, 0([[REG2]]) ; LARGE: [[VAR]]: ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]] ; LARGE: .type [[VAR2]],@object ; LARGE: .data ; LARGE: .globl [[VAR2]] ; LARGE: [[VAR2]]: ; LARGE: .long 5 ; LARGE: .type gi,@object ; LARGE-NEXT: .data ; LARGE-NEXT: .globl gi ; LARGE-NEXT: .p2align 2 ; LARGE-NEXT: gi: ; LARGE-NEXT: .long 5 ; LARGE: .section .toc,"aw",@progbits ; LARGE-NEXT: [[VAR]]: ; LARGE-NEXT: .tc gi[TC],gi
llvm/test/CodeGen/PowerPC/mcm-6.ll +4 −4 Original line number Diff line number Diff line Loading @@ -22,7 +22,7 @@ entry: ; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]]) ; CHECK: lwz {{[0-9]+}}, 0([[REG2]]) ; CHECK: stw {{[0-9]+}}, 0([[REG2]]) ; CHECK: .section .toc ; CHECK: .LC[[TOCNUM]]: ; CHECK: .tc [[VAR:[a-z0-9A-Z_.]+]][TC],{{[a-z0-9A-Z_.]+}} ; CHECK: .comm [[VAR]],4,4 ; CHECK: .comm ti,4,4 ; CHECK: .section .toc,"aw",@progbits ; CHECK-NEXT: .LC[[TOCNUM]]: ; CHECK-NEXT: .tc ti[TC],ti
llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll +3 −2 Original line number Diff line number Diff line Loading @@ -33,8 +33,9 @@ entry: ; LARGE-BSS-DAG: lwz {{[0-9]+}}, 0([[VREG]]) ; LARGE-BSS-DAG: stw {{[0-9]+}}, 8(1) ; LARGE-BSS: lwz 30, 24(1) ; LARGE-BSS: [[VREF]]: ; LARGE-BSS: .section .got2,"aw",@progbits ; LARGE-BSS-NEXT: .p2align 2 ; LARGE-BSS-NEXT: [[VREF]]: ; LARGE-BSS-NEXT: .long bar ; LARGE-SECUREPLT: addis 30, 30, .LTOC-.L0$pb@ha ; LARGE-SECUREPLT: addi 30, 30, .LTOC-.L0$pb@l Loading