Commit 935bacd3 authored by Simon Pilgrim's avatar Simon Pilgrim
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[DAG] SimplifyDemandedBits - correctly adjust truncated shift amount type 

As noticed on D56387, for vectors we must always correctly adjust the shift amount type during truncation (not just after legalization). We were getting away with it as we currently only accepted scalars via the dyn_cast<ConstantSDNode>.
parent ed2853d2

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

+3 −3
Original line number Diff line number Diff line
@@ -2023,12 +2023,12 @@ bool TargetLowering::SimplifyDemandedBits( 
        if (!(HighBits & DemandedBits)) {

          // None of the shifted in bits are needed.  Add a truncate of the

          // shift input, then shift it.

          if (TLO.LegalTypes())

            ShAmt = TLO.DAG.getConstant(ShVal, dl, getShiftAmountTy(VT, DL));

          SDValue NewShAmt = TLO.DAG.getConstant(

              ShVal, dl, getShiftAmountTy(VT, DL, TLO.LegalTypes()));

          SDValue NewTrunc =

              TLO.DAG.getNode(ISD::TRUNCATE, dl, VT, Src.getOperand(0));

          return TLO.CombineTo(

              Op, TLO.DAG.getNode(ISD::SRL, dl, VT, NewTrunc, ShAmt));

              Op, TLO.DAG.getNode(ISD::SRL, dl, VT, NewTrunc, NewShAmt));

        }

        break;

      }