Commit 904a8f6a authored by Bill Wendling's avatar Bill Wendling
Browse files

Merging r213799: 

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r213799 | grosbach | 2014-07-23 13:41:38 -0700 (Wed, 23 Jul 2014) | 5 lines

X86: restrict combine to when type sizes are safe.

The folding of unary operations through a vector compare and mask operation
is only safe if the unary operation result is of the same size as its input.
For example, it's not safe for [su]itofp from v4i32 to v4f64.
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llvm-svn: 214841
parent 20b8eb19

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

+5 −3
Original line number Diff line number Diff line
@@ -6450,11 +6450,13 @@ static SDValue performVectorCompareAndMaskUnaryOpCombine(SDNode *N, 
  //       AND(VECTOR_CMP(x,y), constant2)

  //    constant2 = UNARYOP(constant)



  // Early exit if this isn't a vector operation or if the operand of the

  // unary operation isn't a bitwise AND.

  // Early exit if this isn't a vector operation, the operand of the

  // unary operation isn't a bitwise AND, or if the sizes of the operations

  // aren't the same.

  EVT VT = N->getValueType(0);

  if (!VT.isVector() || N->getOperand(0)->getOpcode() != ISD::AND ||

      N->getOperand(0)->getOperand(0)->getOpcode() != ISD::SETCC)

      N->getOperand(0)->getOperand(0)->getOpcode() != ISD::SETCC ||

      VT.getSizeInBits() != N->getOperand(0)->getValueType(0).getSizeInBits())

    return SDValue();



  // Now check that the other operand of the AND is a constant splat. We could

llvm/lib/Target/X86/X86ISelLowering.cpp

+5 −3
Original line number Diff line number Diff line
@@ -21854,11 +21854,13 @@ static SDValue performVectorCompareAndMaskUnaryOpCombine(SDNode *N, 
  //       AND(VECTOR_CMP(x,y), constant2)

  //    constant2 = UNARYOP(constant)













  // Early exit if this isn't a vector operation or if the operand of the













  // unary operation isn't a bitwise AND.













  // Early exit if this isn't a vector operation, the operand of the













  // unary operation isn't a bitwise AND, or if the sizes of the operations













  // aren't the same.















  EVT VT = N->getValueType(0);















  if (!VT.isVector() || N->getOperand(0)->getOpcode() != ISD::AND ||













      N->getOperand(0)->getOperand(0)->getOpcode() != ISD::SETCC)













      N->getOperand(0)->getOperand(0)->getOpcode() != ISD::SETCC ||













      VT.getSizeInBits() != N->getOperand(0)->getValueType(0).getSizeInBits())















    return SDValue();





























  // Now check that the other operand of the AND is a constant splat. We could

























llvm/test/CodeGen/AArch64/arm64-setcc-int-to-fp-combine.ll



+14
−0






























Original line number
Diff line number
Diff line








@@ -11,3 +11,17 @@ define <4 x float> @foo(<4 x float> %val, <4 x float> %test) nounwind {













  %result = sitofp <4 x i32> %ext to <4 x float>















  ret <4 x float> %result















}













; Make sure the operation doesn't try to get folded when the sizes don't match,













; as that ends up crashing later when trying to form a bitcast operation for













; the folded nodes.













define void @foo1(<4 x float> %val, <4 x float> %test, <4 x double>* %p) nounwind {













; CHECK-LABEL: foo1:













; CHECK: movi.4s













; CHECK: scvtf.2d













; CHECK: scvtf.2d













  %cmp = fcmp oeq <4 x float> %val, %test













  %ext = zext <4 x i1> %cmp to <4 x i32>













  %result = sitofp <4 x i32> %ext to <4 x double>













  store <4 x double> %result, <4 x double>* %p













  ret void













}
























llvm/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll



+27
−3






























Original line number
Diff line number
Diff line








@@ -17,14 +17,38 @@ define <4 x float> @foo(<4 x float> %val, <4 x float> %test) nounwind {













  ret <4 x float> %result















}





























define void @bar(<4 x float>* noalias %result) nounwind {













; Make sure the operation doesn't try to get folded when the sizes don't match,













; as that ends up crashing later when trying to form a bitcast operation for













; the folded nodes.













define void @foo1(<4 x float> %val, <4 x float> %test, <4 x double>* %p) nounwind {















; CHECK-LABEL: LCPI1_0:













; CHECK-NEXT: .long 1                       ## 0x1













; CHECK-NEXT: .long 1                       ## 0x1













; CHECK-NEXT: .long 1                       ## 0x1













; CHECK-NEXT: .long 1                       ## 0x1













; CHECK-LABEL: foo1:













;   FIXME: The operation gets scalarized. If/when the compiler learns to better













;          use [V]CVTDQ2PD, this will need updated.













; CHECK: cvtsi2sdq













; CHECK: cvtsi2sdq













; CHECK: cvtsi2sdq













; CHECK: cvtsi2sdq













  %cmp = fcmp oeq <4 x float> %val, %test













  %ext = zext <4 x i1> %cmp to <4 x i32>













  %result = sitofp <4 x i32> %ext to <4 x double>













  store <4 x double> %result, <4 x double>* %p













  ret void













}



























; Also test the general purpose constant folding of int->fp.













define void @foo2(<4 x float>* noalias %result) nounwind {













; CHECK-LABEL: LCPI2_0:















; CHECK-NEXT: .long 1082130432              ## float 4.000000e+00















; CHECK-NEXT: .long 1084227584              ## float 5.000000e+00















; CHECK-NEXT: .long 1086324736              ## float 6.000000e+00















; CHECK-NEXT: .long 1088421888              ## float 7.000000e+00













; CHECK-LABEL: bar:













; CHECK:  movaps LCPI1_0(%rip), %xmm0













; CHECK-LABEL: foo2:













; CHECK:  movaps LCPI2_0(%rip), %xmm0































  %val = uitofp <4 x i32> <i32 4, i32 5, i32 6, i32 7> to <4 x float>















  store <4 x float> %val, <4 x float>* %result