Commit 8cef4551 authored by Zhuojia Shen's avatar Zhuojia Shen
Browse files

[ARM] Fix STRT/STRHT/STRBT input/output operands. 

STRT, STRHT, and STRBT are store instructions and their source register
$Rt should be treated as an input operand instead of an output operand.
This should fix things (e.g., liveness tracking in LivePhysRegs) if
these instructions were used in CodeGen.

Differential Revision: https://reviews.llvm.org/D95074
parent a9bd3d37

llvm/lib/Target/ARM/ARMInstrThumb2.td

+1 −1
Original line number Diff line number Diff line
@@ -1724,7 +1724,7 @@ def t2STRH_preidx: t2PseudoInst<(outs GPRnopc:$Rn_wb), 
// only.

// Ref: A8.6.193 STR (immediate, Thumb) Encoding T4

class T2IstT<bits<2> type, string opc, InstrItinClass ii>

  : T2Ii8<(outs rGPR:$Rt), (ins t2addrmode_imm8:$addr), ii, opc,

  : T2Ii8<(outs), (ins rGPR:$Rt, t2addrmode_imm8:$addr), ii, opc,

          "\t$Rt, $addr", []>, Sched<[WriteST]> {

  let Inst{31-27} = 0b11111;

  let Inst{26-25} = 0b00;