Loading llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +1 −1 Original line number Diff line number Diff line Loading @@ -79,7 +79,7 @@ namespace { class PPCAsmPrinter : public AsmPrinter { protected: MapVector<const MCSymbol *, MCSymbol *> TOC; const PPCSubtarget *Subtarget; const PPCSubtarget *Subtarget = nullptr; StackMaps SM; public: Loading llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +5 −5 Original line number Diff line number Diff line Loading @@ -138,9 +138,9 @@ namespace { /// class PPCDAGToDAGISel : public SelectionDAGISel { const PPCTargetMachine &TM; const PPCSubtarget *PPCSubTarget; const PPCTargetLowering *PPCLowering; unsigned GlobalBaseReg; const PPCSubtarget *PPCSubTarget = nullptr; const PPCTargetLowering *PPCLowering = nullptr; unsigned GlobalBaseReg = 0; public: explicit PPCDAGToDAGISel(PPCTargetMachine &tm, CodeGenOpt::Level OptLevel) Loading Loading @@ -2385,7 +2385,7 @@ class BitPermutationSelector { SmallVector<ValueBit, 64> Bits; bool NeedMask; bool NeedMask = false; SmallVector<unsigned, 64> RLAmt; SmallVector<BitGroup, 16> BitGroups; Loading @@ -2393,7 +2393,7 @@ class BitPermutationSelector { DenseMap<std::pair<SDValue, unsigned>, ValueRotInfo> ValueRots; SmallVector<ValueRotInfo, 16> ValueRotsVec; SelectionDAG *CurDAG; SelectionDAG *CurDAG = nullptr; public: BitPermutationSelector(SelectionDAG *DAG) Loading llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h +1 −1 Original line number Diff line number Diff line Loading @@ -42,7 +42,7 @@ class PPCFunctionInfo : public MachineFunctionInfo { /// MustSaveLR - Indicates whether LR is defined (or clobbered) in the current /// function. This is only valid after the initial scan of the function by /// PEI. bool MustSaveLR; bool MustSaveLR = false; /// MustSaveTOC - Indicates that the TOC save needs to be performed in the /// prologue of the function. This is typically the case when there are Loading Loading
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +1 −1 Original line number Diff line number Diff line Loading @@ -79,7 +79,7 @@ namespace { class PPCAsmPrinter : public AsmPrinter { protected: MapVector<const MCSymbol *, MCSymbol *> TOC; const PPCSubtarget *Subtarget; const PPCSubtarget *Subtarget = nullptr; StackMaps SM; public: Loading
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +5 −5 Original line number Diff line number Diff line Loading @@ -138,9 +138,9 @@ namespace { /// class PPCDAGToDAGISel : public SelectionDAGISel { const PPCTargetMachine &TM; const PPCSubtarget *PPCSubTarget; const PPCTargetLowering *PPCLowering; unsigned GlobalBaseReg; const PPCSubtarget *PPCSubTarget = nullptr; const PPCTargetLowering *PPCLowering = nullptr; unsigned GlobalBaseReg = 0; public: explicit PPCDAGToDAGISel(PPCTargetMachine &tm, CodeGenOpt::Level OptLevel) Loading Loading @@ -2385,7 +2385,7 @@ class BitPermutationSelector { SmallVector<ValueBit, 64> Bits; bool NeedMask; bool NeedMask = false; SmallVector<unsigned, 64> RLAmt; SmallVector<BitGroup, 16> BitGroups; Loading @@ -2393,7 +2393,7 @@ class BitPermutationSelector { DenseMap<std::pair<SDValue, unsigned>, ValueRotInfo> ValueRots; SmallVector<ValueRotInfo, 16> ValueRotsVec; SelectionDAG *CurDAG; SelectionDAG *CurDAG = nullptr; public: BitPermutationSelector(SelectionDAG *DAG) Loading
llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h +1 −1 Original line number Diff line number Diff line Loading @@ -42,7 +42,7 @@ class PPCFunctionInfo : public MachineFunctionInfo { /// MustSaveLR - Indicates whether LR is defined (or clobbered) in the current /// function. This is only valid after the initial scan of the function by /// PEI. bool MustSaveLR; bool MustSaveLR = false; /// MustSaveTOC - Indicates that the TOC save needs to be performed in the /// prologue of the function. This is typically the case when there are Loading