Loading llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +8 −0 Original line number Diff line number Diff line Loading @@ -1423,6 +1423,14 @@ bool AArch64InstructionSelector::select(MachineInstr &I) { MachineFunction &MF = *MBB.getParent(); MachineRegisterInfo &MRI = MF.getRegInfo(); const AArch64Subtarget *Subtarget = &static_cast<const AArch64Subtarget &>(MF.getSubtarget()); if (Subtarget->requiresStrictAlign()) { // We don't support this feature yet. LLVM_DEBUG(dbgs() << "AArch64 GISel does not support strict-align yet\n"); return false; } unsigned Opcode = I.getOpcode(); // G_PHI requires same handling as PHI if (!isPreISelGenericOpcode(Opcode) || Opcode == TargetOpcode::G_PHI) { Loading llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll +9 −0 Original line number Diff line number Diff line Loading @@ -209,3 +209,12 @@ define <4 x i16> @zext_v4s8(<4 x i8> %in) { ret <4 x i16> %ext } ; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: cannot select: RET_ReallyLR implicit $x0 (in function: strict_align_feature) ; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for strict_align_feature ; FALLBACK-WITH-REPORT-OUT-LABEL: strict_align_feature define i64 @strict_align_feature(i64* %p) #0 { %x = load i64, i64* %p, align 1 ret i64 %x } attributes #0 = { "target-features"="+strict-align" } Loading
llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +8 −0 Original line number Diff line number Diff line Loading @@ -1423,6 +1423,14 @@ bool AArch64InstructionSelector::select(MachineInstr &I) { MachineFunction &MF = *MBB.getParent(); MachineRegisterInfo &MRI = MF.getRegInfo(); const AArch64Subtarget *Subtarget = &static_cast<const AArch64Subtarget &>(MF.getSubtarget()); if (Subtarget->requiresStrictAlign()) { // We don't support this feature yet. LLVM_DEBUG(dbgs() << "AArch64 GISel does not support strict-align yet\n"); return false; } unsigned Opcode = I.getOpcode(); // G_PHI requires same handling as PHI if (!isPreISelGenericOpcode(Opcode) || Opcode == TargetOpcode::G_PHI) { Loading
llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll +9 −0 Original line number Diff line number Diff line Loading @@ -209,3 +209,12 @@ define <4 x i16> @zext_v4s8(<4 x i8> %in) { ret <4 x i16> %ext } ; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: cannot select: RET_ReallyLR implicit $x0 (in function: strict_align_feature) ; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for strict_align_feature ; FALLBACK-WITH-REPORT-OUT-LABEL: strict_align_feature define i64 @strict_align_feature(i64* %p) #0 { %x = load i64, i64* %p, align 1 ret i64 %x } attributes #0 = { "target-features"="+strict-align" }