Commit 742cf399 authored by Cullen Rhodes's avatar Cullen Rhodes
Browse files

[AArch64] NFC: Use 'asm' in SIMDScalarCPY 

Fixes a warning identified in D109359. The mnemonic is also mov, not
cpy.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D109573
parent ac3edc4c

llvm/lib/Target/AArch64/AArch64InstrFormats.td

+6 −6
Original line number Diff line number Diff line
@@ -7658,8 +7658,8 @@ multiclass SIMDTableLookupTied<bit op, string asm> { 
//----------------------------------------------------------------------------

let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in

class BaseSIMDScalarCPY<RegisterClass regtype, RegisterOperand vectype,

                        string kind, Operand idxtype>

  : I<(outs regtype:$dst), (ins vectype:$src, idxtype:$idx), "mov",

                        string asm, string kind, Operand idxtype>

  : I<(outs regtype:$dst), (ins vectype:$src, idxtype:$idx), asm,

       "{\t$dst, $src" # kind # "$idx" #

       "|\t$dst, $src$idx}", "", []>,

    Sched<[WriteV]> {
@@ -7679,22 +7679,22 @@ class SIMDScalarCPYAlias<string asm, string size, Instruction inst, 




multiclass SIMDScalarCPY<string asm> {

  def i8  : BaseSIMDScalarCPY<FPR8,  V128, ".b", VectorIndexB> {

  def i8  : BaseSIMDScalarCPY<FPR8,  V128, asm, ".b", VectorIndexB> {

    bits<4> idx;

    let Inst{20-17} = idx;

    let Inst{16} = 1;

  }

  def i16 : BaseSIMDScalarCPY<FPR16, V128, ".h", VectorIndexH> {

  def i16 : BaseSIMDScalarCPY<FPR16, V128, asm, ".h", VectorIndexH> {

    bits<3> idx;

    let Inst{20-18} = idx;

    let Inst{17-16} = 0b10;

  }

  def i32 : BaseSIMDScalarCPY<FPR32, V128, ".s", VectorIndexS> {

  def i32 : BaseSIMDScalarCPY<FPR32, V128, asm, ".s", VectorIndexS> {

    bits<2> idx;

    let Inst{20-19} = idx;

    let Inst{18-16} = 0b100;

  }

  def i64 : BaseSIMDScalarCPY<FPR64, V128, ".d", VectorIndexD> {

  def i64 : BaseSIMDScalarCPY<FPR64, V128, asm, ".d", VectorIndexD> {

    bits<1> idx;

    let Inst{20} = idx;

    let Inst{19-16} = 0b1000;

llvm/lib/Target/AArch64/AArch64InstrInfo.td

+1 −1
Original line number Diff line number Diff line
@@ -5253,7 +5253,7 @@ def : Pat<(v16i8 (int_aarch64_neon_tbx1 (v16i8 V128:$Rd), 
// AdvSIMD scalar CPY instruction

//----------------------------------------------------------------------------



defm CPY : SIMDScalarCPY<"cpy">;

defm CPY : SIMDScalarCPY<"mov">;



//----------------------------------------------------------------------------

// AdvSIMD scalar pairwise instructions