Revert "[X86][AMX] Fix tile config register spill issue." (64132f54) · Commits · llvm-doe / llvm-project

llvm/include/llvm/CodeGen/LiveIntervals.h

+0 −7

Original line number	Diff line number	Diff line
		@@ -377,13 +377,6 @@ class VirtRegMap;
		bool checkRegMaskInterference(LiveInterval &LI,
		BitVector &UsableRegs);

		/// Get the interferenced slot index and its regmask for an live interval.
		/// Return false if ther is no interference.
		bool
		getInterferenceRegMasks(LiveInterval &LI,
		SmallVectorImpl<SlotIndex> &RegSlots,
		SmallVectorImpl<const uint32_t *> &RegMaskBits);

		// Register unit functions.
		//
		// Fixed interference occurs when MachineInstrs use physregs directly

llvm/lib/CodeGen/LiveIntervals.cpp

+0 −50

Original line number	Diff line number	Diff line
		@@ -952,56 +952,6 @@ bool LiveIntervals::checkRegMaskInterference(LiveInterval &LI,
		}
		}

		bool LiveIntervals::getInterferenceRegMasks(
		LiveInterval &LI, SmallVectorImpl<SlotIndex> &RegSlots,
		SmallVectorImpl<const uint32_t *> &RegBits) {
		if (LI.empty())
		return false;
		LiveInterval::iterator LiveI = LI.begin(), LiveE = LI.end();

		// Use a smaller arrays for local live ranges.
		ArrayRef<SlotIndex> Slots;
		ArrayRef<const uint32_t *> Bits;
		if (MachineBasicBlock *MBB = intervalIsInOneMBB(LI)) {
		Slots = getRegMaskSlotsInBlock(MBB->getNumber());
		Bits = getRegMaskBitsInBlock(MBB->getNumber());
		} else {
		Slots = getRegMaskSlots();
		Bits = getRegMaskBits();
		}

		// We are going to enumerate all the register mask slots contained in LI.
		// Start with a binary search of RegMaskSlots to find a starting point.
		ArrayRef<SlotIndex>::iterator SlotI = llvm::lower_bound(Slots, LiveI->start);
		ArrayRef<SlotIndex>::iterator SlotE = Slots.end();

		// No slots in range, LI begins after the last call.
		if (SlotI == SlotE)
		return false;

		bool Found = false;
		while (true) {
		assert(*SlotI >= LiveI->start);
		// Loop over all slots overlapping this segment.
		while (*SlotI < LiveI->end) {
		// *SlotI overlaps LI. Collect mask bits.
		Found = true;
		RegSlots.push_back(*SlotI);
		RegBits.push_back(Bits[SlotI - Slots.begin()]);
		if (++SlotI == SlotE)
		return Found;
		}
		// *SlotI is beyond the current LI segment.
		LiveI = LI.advanceTo(LiveI, *SlotI);
		if (LiveI == LiveE)
		return Found;
		// Advance SlotI until it overlaps.
		while (*SlotI < LiveI->start)
		if (++SlotI == SlotE)
		return Found;
		}
		}

		//===----------------------------------------------------------------------===//
		// IntervalUpdate class.
		//===----------------------------------------------------------------------===//

llvm/lib/Target/X86/X86ExpandPseudo.cpp

+14 −1

Original line number	Diff line number	Diff line
		@@ -461,13 +461,25 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
		case TargetOpcode::ICALL_BRANCH_FUNNEL:
		ExpandICallBranchFunnel(&MBB, MBBI);
		return true;
		case X86::PLDTILECFG: {
		MI.RemoveOperand(0);
		MI.setDesc(TII->get(X86::LDTILECFG));
		return true;
		}
		case X86::PSTTILECFG: {
		MI.RemoveOperand(MI.getNumOperands() - 1); // Remove $tmmcfg
		MI.setDesc(TII->get(X86::STTILECFG));
		return true;
		}
		case X86::PTILELOADDV: {
		MI.RemoveOperand(8); // Remove $tmmcfg
		for (unsigned i = 2; i > 0; --i)
		MI.RemoveOperand(i);
		MI.setDesc(TII->get(X86::TILELOADD));
		return true;
		}
		case X86::PTDPBSSDV: {
		MI.RemoveOperand(7); // Remove $tmmcfg
		MI.untieRegOperand(4);
		for (unsigned i = 3; i > 0; --i)
		MI.RemoveOperand(i);
		@@ -476,13 +488,14 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
		return true;
		}
		case X86::PTILESTOREDV: {
		MI.RemoveOperand(8); // Remove $tmmcfg
		for (int i = 1; i >= 0; --i)
		MI.RemoveOperand(i);
		MI.setDesc(TII->get(X86::TILESTORED));
		return true;
		}
		case X86::PTILEZEROV: {
		for (int i = 2; i > 0; --i) // Remove row, col
		for (int i = 3; i > 0; --i) // Remove row, col, $tmmcfg
		MI.RemoveOperand(i);
		MI.setDesc(TII->get(X86::TILEZERO));
		return true;

llvm/lib/Target/X86/X86FrameLowering.cpp

+2 −8

Original line number	Diff line number	Diff line
		@@ -2094,14 +2094,8 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,

		// Emit tilerelease for AMX kernel.
		const MachineRegisterInfo &MRI = MF.getRegInfo();
		const TargetRegisterClass *RC = TRI->getRegClass(X86::TILERegClassID);
		unsigned TileRegNum = RC->getNumRegs();
		for (unsigned I = 0; I < TileRegNum; I++) {
		if (!MRI.reg_nodbg_empty(X86::TMM0 + I)) {
		if (!MRI.reg_nodbg_empty(X86::TMMCFG))
		BuildMI(MBB, Terminator, DL, TII.get(X86::TILERELEASE));
		break;
		}
		}
		}

		StackOffset X86FrameLowering::getFrameIndexReference(const MachineFunction &MF,

llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

+8 −1

Original line number	Diff line number	Diff line
		@@ -4606,6 +4606,7 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
		SDValue Index = Node->getOperand(5);
		SDValue Disp = CurDAG->getTargetConstant(0, dl, MVT::i32);
		SDValue Segment = CurDAG->getRegister(0, MVT::i16);
		SDValue CFG = CurDAG->getRegister(0, MVT::Untyped);
		SDValue Chain = Node->getOperand(0);
		MachineSDNode *CNode;
		SDValue Ops[] = {Node->getOperand(2),
		@@ -4615,6 +4616,7 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
		Index,
		Disp,
		Segment,
		CFG,
		Chain};
		CNode = CurDAG->getMachineNode(Opc, dl, {MVT::x86amx, MVT::Other}, Ops);
		ReplaceNode(Node, CNode);
		@@ -4625,12 +4627,14 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
		break;
		SDValue Chain = Node->getOperand(0);
		unsigned Opc = X86::PTDPBSSDV;
		SDValue CFG = CurDAG->getRegister(0, MVT::Untyped);
		SDValue Ops[] = {Node->getOperand(2),
		Node->getOperand(3),
		Node->getOperand(4),
		Node->getOperand(5),
		Node->getOperand(6),
		Node->getOperand(7),
		CFG,
		Chain};
		MachineSDNode *CNode =
		CurDAG->getMachineNode(Opc, dl, {MVT::x86amx, MVT::Other}, Ops);
		@@ -4642,7 +4646,8 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
		break;
		unsigned Opc = X86::PTILEZEROV;
		SDValue Chain = Node->getOperand(0);
		SDValue Ops[] = {Node->getOperand(2), Node->getOperand(3), Chain};
		SDValue CFG = CurDAG->getRegister(0, MVT::Untyped);
		SDValue Ops[] = {Node->getOperand(2), Node->getOperand(3), CFG, Chain};
		MachineSDNode *CNode =
		CurDAG->getMachineNode(Opc, dl, {MVT::x86amx, MVT::Other}, Ops);
		ReplaceNode(Node, CNode);
		@@ -4713,6 +4718,7 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
		SDValue Index = Node->getOperand(5);
		SDValue Disp = CurDAG->getTargetConstant(0, dl, MVT::i32);
		SDValue Segment = CurDAG->getRegister(0, MVT::i16);
		SDValue CFG = CurDAG->getRegister(0, MVT::Untyped);
		SDValue Chain = Node->getOperand(0);
		MachineSDNode *CNode;
		SDValue Ops[] = {Node->getOperand(2),
		@@ -4723,6 +4729,7 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
		Disp,
		Segment,
		Node->getOperand(6),
		CFG,
		Chain};
		CNode = CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops);
		ReplaceNode(Node, CNode);

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