Commit 62761191 authored by Chandler Carruth's avatar Chandler Carruth
Browse files

Merge r329771, fixing $regname to be %regname. 

llvm-svn: 332937
parent 8fc24de9

llvm/lib/Target/X86/X86FlagsCopyLowering.cpp

+22 −3
Original line number Diff line number Diff line
@@ -727,8 +727,27 @@ void X86FlagsCopyLoweringPass::rewriteSetCC(MachineBasicBlock &TestMBB, 
  if (!CondReg)

    CondReg = promoteCondToReg(TestMBB, TestPos, TestLoc, Cond);



  // Rewriting this is trivial: we just replace the register and remove the

  // setcc.

  // Rewriting a register def is trivial: we just replace the register and

  // remove the setcc.

  if (!SetCCI.mayStore()) {

    assert(SetCCI.getOperand(0).isReg() &&

           "Cannot have a non-register defined operand to SETcc!");

    MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg);

    SetCCI.eraseFromParent();

    return;

  }



  // Otherwise, we need to emit a store.

  auto MIB = BuildMI(*SetCCI.getParent(), SetCCI.getIterator(),

                     SetCCI.getDebugLoc(), TII->get(X86::MOV8mr));

  // Copy the address operands.

  for (int i = 0; i < X86::AddrNumOperands; ++i)

    MIB.add(SetCCI.getOperand(i));



  MIB.addReg(CondReg);



  MIB->setMemRefs(SetCCI.memoperands_begin(), SetCCI.memoperands_end());



  SetCCI.eraseFromParent();

  return;

}

llvm/test/CodeGen/X86/flags-copy-lowering.mir

+1 −2
Original line number Diff line number Diff line
@@ -208,11 +208,10 @@ body: | 
    %3:gr8 = SETAr implicit %eflags

    %4:gr8 = SETBr implicit %eflags

    %5:gr8 = SETEr implicit %eflags

    %6:gr8 = SETNEr implicit killed %eflags

    SETNEm %rsp, 1, %noreg, -16, %noreg, implicit killed %eflags

    MOV8mr %rsp, 1, %noreg, -16, %noreg, killed %3

    MOV8mr %rsp, 1, %noreg, -16, %noreg, killed %4

    MOV8mr %rsp, 1, %noreg, -16, %noreg, killed %5

    MOV8mr %rsp, 1, %noreg, -16, %noreg, killed %6

  ; CHECK-NOT:     %eflags =

  ; CHECK-NOT:             = SET{{.*}}

  ; CHECK:         MOV8mr {{.*}}, killed %[[A_REG]]