Commit 5dc26cea authored by Pawel Wodnicki's avatar Pawel Wodnicki
Browse files

Merging r168320: into 3.2 relase branch.

Handle mixed normal and early-clobber defs on inline asm.

PR14376.

llvm-svn: 168527
parent 3b317658
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+10 −2
Original line number Diff line number Diff line
@@ -59,8 +59,16 @@ VNInfo *LiveInterval::createDeadDef(SlotIndex Def,
    return VNI;
  }
  if (SlotIndex::isSameInstr(Def, I->start)) {
    assert(I->start == Def && "Cannot insert def, already live");
    assert(I->valno->def == Def && "Inconsistent existing value def");
    assert(I->valno->def == I->start && "Inconsistent existing value def");

    // It is possible to have both normal and early-clobber defs of the same
    // register on an instruction. It doesn't make a lot of sense, but it is
    // possible to specify in inline assembly.
    //
    // Just convert everything to early-clobber.
    Def = std::min(Def, I->start);
    if (Def != I->start)
      I->start = I->valno->def = Def;
    return I->valno;
  }
  assert(SlotIndex::isEarlierInstr(Def, I->start) && "Already live at def");
+7 −0
Original line number Diff line number Diff line
@@ -52,3 +52,10 @@ entry:
  %0 = call { i32, i32, i32, i32, i32 } asm sideeffect "", "=&r,=&r,=&r,=&r,=&q,r,~{ecx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %h) nounwind
  ret void
}

; Mix normal and EC defs of the same register.
define i32 @pr14376() nounwind noinline {
entry:
  %asm = tail call i32 asm sideeffect "", "={ax},i,~{eax},~{flags},~{rax}"(i64 61) nounwind
  ret i32 %asm
}