Loading llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt +1 −0 Original line number Diff line number Diff line Loading @@ -171,3 +171,4 @@ 0x00 0x01 0x05 0xd8 # CHECK: jic $5, 256 0x25 0x04 0xa1 0x7c # CHECK: cache 1, 8($5) 0x35 0x04 0xa1 0x7c # CHECK: pref 1, 8($5 0x05 0x00 0x17 0x04 # CHECK: sigrie 5 llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt +1 −0 Original line number Diff line number Diff line Loading @@ -198,3 +198,4 @@ 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260 0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20 0x04 0x17 0x00 0x05 # CHECK: sigrie 5 llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt +1 −0 Original line number Diff line number Diff line Loading @@ -197,3 +197,4 @@ 0x33 0xfe 0x1d 0x02 # CHECK: tltu $16, $sp, 1016 0x36 0x00 0xd1 0x00 # CHECK: tne $6, $17 0x76 0xdd 0xe8 0x00 # CHECK: tne $7, $8, 885 0x05 0x00 0x17 0x04 # CHECK: sigrie 5 llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt +1 −0 Original line number Diff line number Diff line Loading @@ -224,3 +224,4 @@ 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260 0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20 0x04 0x17 0x00 0x05 # CHECK: sigrie 5 Loading
llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt +1 −0 Original line number Diff line number Diff line Loading @@ -171,3 +171,4 @@ 0x00 0x01 0x05 0xd8 # CHECK: jic $5, 256 0x25 0x04 0xa1 0x7c # CHECK: cache 1, 8($5) 0x35 0x04 0xa1 0x7c # CHECK: pref 1, 8($5 0x05 0x00 0x17 0x04 # CHECK: sigrie 5
llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt +1 −0 Original line number Diff line number Diff line Loading @@ -198,3 +198,4 @@ 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260 0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20 0x04 0x17 0x00 0x05 # CHECK: sigrie 5
llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt +1 −0 Original line number Diff line number Diff line Loading @@ -197,3 +197,4 @@ 0x33 0xfe 0x1d 0x02 # CHECK: tltu $16, $sp, 1016 0x36 0x00 0xd1 0x00 # CHECK: tne $6, $17 0x76 0xdd 0xe8 0x00 # CHECK: tne $7, $8, 885 0x05 0x00 0x17 0x04 # CHECK: sigrie 5
llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt +1 −0 Original line number Diff line number Diff line Loading @@ -224,3 +224,4 @@ 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260 0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20 0x04 0x17 0x00 0x05 # CHECK: sigrie 5