Unverified Commit 4f50fe92 authored by Joe Nash's avatar Joe Nash Committed by GitHub
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[AMDGPU][MC] Permit unneeded VOPD mov operands to be non-zero (#194060)

Use ? instead of 0 in the tablegen definitions for VOPD containing
v_mov. This enables the instruction to be disassembled regardless of
what bits are in those fields, which helps diagnose broken code.
Previously, the disassembler would reject these.
parent cc2b2f54
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+4 −4
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@@ -148,16 +148,16 @@ class VOPD<dag outs, dag ins, string asm, VOP_Pseudo VDX, VOP_Pseudo VDY,
           VOPD_Component XasVC, VOPD_Component YasVC, GFXGenD Gen>
    : VOPD_Base<outs, ins, asm, VDX, VDY, XasVC, YasVC, Gen>,
      VOPDe<XasVC.VOPDOp{3-0}, YasVC.VOPDOp{4-0}> {
  let Inst{16-9} = !if (!eq(VDX.Mnemonic, "v_mov_b32"), 0x0, vsrc1X);
  let Inst{48-41} = !if (!eq(VDY.Mnemonic, "v_mov_b32"), 0x0, vsrc1Y);
  let Inst{16-9} = !if (!eq(VDX.Mnemonic, "v_mov_b32"), ?, vsrc1X);
  let Inst{48-41} = !if (!eq(VDY.Mnemonic, "v_mov_b32"), ?, vsrc1Y);
}

class VOPD_MADK<dag outs, dag ins, string asm, VOP_Pseudo VDX, VOP_Pseudo VDY,
                VOPD_Component XasVC, VOPD_Component YasVC, GFXGenD Gen>
    : VOPD_Base<outs, ins, asm, VDX, VDY, XasVC, YasVC, Gen>,
      VOPD_MADKe<XasVC.VOPDOp{3-0}, YasVC.VOPDOp{4-0}> {
  let Inst{16-9} = !if (!eq(VDX.Mnemonic, "v_mov_b32"), 0x0, vsrc1X);
  let Inst{48-41} = !if (!eq(VDY.Mnemonic, "v_mov_b32"), 0x0, vsrc1Y);
  let Inst{16-9} = !if (!eq(VDX.Mnemonic, "v_mov_b32"), ?, vsrc1X);
  let Inst{48-41} = !if (!eq(VDY.Mnemonic, "v_mov_b32"), ?, vsrc1Y);
  let Size = 12;
  let FixedSize = 1;
}
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# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -disassemble -show-encoding < %s | FileCheck %s -strict-whitespace --check-prefix=GFX12
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -disassemble -show-encoding < %s | FileCheck %s -strict-whitespace --check-prefix=GFX12

# Test that VOPD instructions with v_dual_mov_b32 tolerate non-zero bits in
# the unused vsrc1 field.

# v_dual_mov_b32 v255, -1 :: v_dual_fmac_f32 v6, src_scc, v4
# With non-zero vsrc1X=0x42
0xc1,0x84,0x00,0xca,0xfd,0x08,0x06,0xff
# GFX12: v_dual_mov_b32 v255, -1 :: v_dual_fmac_f32 v6, src_scc, v4 ; encoding: [0xc1,0x00,0x00,0xca,0xfd,0x08,0x06,0xff]

# v_dual_add_f32 v255, -1, v4 :: v_dual_mov_b32 v6, src_scc
# With non-zero vsrc1Y=0x42
0xc1,0x08,0x10,0xc9,0xfd,0x84,0x06,0xff
# GFX12: v_dual_add_f32 v255, -1, v4 :: v_dual_mov_b32 v6, src_scc ; encoding: [0xc1,0x08,0x10,0xc9,0xfd,0x00,0x06,0xff]

# v_dual_mov_b32 v255, -1 :: v_dual_fmamk_f32 v6, src_scc, 0xaf123456, v255
# With non-zero vsrc1X=0x42
0xc1,0x84,0x04,0xca,0xfd,0xfe,0x07,0xff,0x56,0x34,0x12,0xaf
# GFX12: v_dual_mov_b32 v255, -1 :: v_dual_fmamk_f32 v6, src_scc, 0xaf123456, v255 ; encoding: [0xc1,0x00,0x04,0xca,0xfd,0xfe,0x07,0xff,0x56,0x34,0x12,0xaf]

# v_dual_fmamk_f32 v255, -1, 0xaf123456, v255 :: v_dual_mov_b32 v6, src_scc
# With non-zero vsrc1Y=0x42
0xc1,0xfe,0x91,0xc8,0xfd,0x84,0x06,0xff,0x56,0x34,0x12,0xaf
# GFX12: v_dual_fmamk_f32 v255, -1, 0xaf123456, v255 :: v_dual_mov_b32 v6, src_scc ; encoding: [0xc1,0xfe,0x91,0xc8,0xfd,0x00,0x06,0xff,0x56,0x34,0x12,0xaf]