Commit 4ef38f9c authored by Frederik Gossen's avatar Frederik Gossen
Browse files

Add log1p lowering from standard to ROCDL intrinsics 

Differential Revision: https://reviews.llvm.org/D95129
parent 69bc0990

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

+2 −0
Original line number Diff line number Diff line
@@ -121,6 +121,8 @@ void mlir::populateGpuToROCDLConversionPatterns( 
                                               "__ocml_log_f64");

  patterns.insert<OpToFuncCallLowering<Log10Op>>(converter, "__ocml_log10_f32",

                                                 "__ocml_log10_f64");

  patterns.insert<OpToFuncCallLowering<Log1pOp>>(converter, "__ocml_log1p_f32",

                                                 "__ocml_log1p_f64");

  patterns.insert<OpToFuncCallLowering<Log2Op>>(converter, "__ocml_log2_f32",

                                                "__ocml_log2_f64");

  patterns.insert<OpToFuncCallLowering<PowFOp>>(converter, "__ocml_pow_f32",

mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir

+15 −0
Original line number Diff line number Diff line
@@ -198,6 +198,21 @@ gpu.module @test_module { 


// -----



gpu.module @test_module {

  // CHECK: llvm.func @__ocml_log1p_f32(f32) -> f32

  // CHECK: llvm.func @__ocml_log1p_f64(f64) -> f64

  // CHECK-LABEL: func @gpu_log1p

  func @gpu_log1p(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {

    %result32 = std.log1p %arg_f32 : f32

    // CHECK: llvm.call @__ocml_log1p_f32(%{{.*}}) : (f32) -> f32

    %result64 = std.log1p %arg_f64 : f64

    // CHECK: llvm.call @__ocml_log1p_f64(%{{.*}}) : (f64) -> f64

    std.return %result32, %result64 : f32, f64

  }

}



// -----



gpu.module @test_module {

  // CHECK: llvm.func @__ocml_log10_f32(f32) -> f32

  // CHECK: llvm.func @__ocml_log10_f64(f64) -> f64