Loading llvm/docs/ReleaseNotes.rst +28 −0 Original line number Diff line number Diff line Loading @@ -238,6 +238,34 @@ Most of the work behind the scenes has been on correctness of generated assembly, and also fixing some assertions we would hit on some well-formed inputs. Changes to the MIPS Target ----------------------------- **During this release the MIPS target has:** * IAS is now enabled by default for Debian mips64el. * Added support for the two operand form for many instructions. * Added the following macros: unaligned load/store, seq, double word load/store for O32. * Improved the parsing of complex memory offset expressions. * Enabled the integrated assembler by default for Debian mips64el. * Added a generic scheduler based on the interAptiv CPU. * Added support for thread local relocations. * Added recip, rsqrt, evp, dvp, synci instructions in IAS. * Optimized the generation of constants from some cases. **The following issues have been fixed:** * Thread local debug information is correctly recorded. * MSA intrinsics are now range checked. * Fixed an issue with MSA and the no-odd-spreg abi. * Fixed some corner cases in handling forbidden slots for MIPSR6. * Fixed an issue with jumps not being converted to relative branches for assembly. * Fixed the handling of local symbols and jal instruction. * N32/N64 no longer have their relocation tables sorted as per their ABIs. * Fixed a crash when half-precision floating point conversion MSA intrinsics are used. * Fixed several crashes involving FastISel. * Corrected the corrected definitions for aui/daui/dahi/dati for MIPSR6. Changes to the OCaml bindings ----------------------------- Loading Loading
llvm/docs/ReleaseNotes.rst +28 −0 Original line number Diff line number Diff line Loading @@ -238,6 +238,34 @@ Most of the work behind the scenes has been on correctness of generated assembly, and also fixing some assertions we would hit on some well-formed inputs. Changes to the MIPS Target ----------------------------- **During this release the MIPS target has:** * IAS is now enabled by default for Debian mips64el. * Added support for the two operand form for many instructions. * Added the following macros: unaligned load/store, seq, double word load/store for O32. * Improved the parsing of complex memory offset expressions. * Enabled the integrated assembler by default for Debian mips64el. * Added a generic scheduler based on the interAptiv CPU. * Added support for thread local relocations. * Added recip, rsqrt, evp, dvp, synci instructions in IAS. * Optimized the generation of constants from some cases. **The following issues have been fixed:** * Thread local debug information is correctly recorded. * MSA intrinsics are now range checked. * Fixed an issue with MSA and the no-odd-spreg abi. * Fixed some corner cases in handling forbidden slots for MIPSR6. * Fixed an issue with jumps not being converted to relative branches for assembly. * Fixed the handling of local symbols and jal instruction. * N32/N64 no longer have their relocation tables sorted as per their ABIs. * Fixed a crash when half-precision floating point conversion MSA intrinsics are used. * Fixed several crashes involving FastISel. * Corrected the corrected definitions for aui/daui/dahi/dati for MIPSR6. Changes to the OCaml bindings ----------------------------- Loading
